Precise abstract interpretation of hardware designs
<p>This dissertation shows that the bounded property verification of hardware Register Transfer Level (RTL) designs can be efficiently performed by precise abstract interpretation of a software representation of the RTL. </p> <p>The first part of this dissertation presents a novel...
| Glavni autor: | |
|---|---|
| Daljnji autori: | |
| Format: | Disertacija |
| Izdano: |
2018
|
| Teme: |