Design of an on-chip integrated 230 GHz dual-polarization balanced SIS receiver for multi-pixel array applications
We report the design of a 230 GHz dual-polarization (2-pol) balanced Superconductor-Insulator-Superconductor (SIS) receiver that can be easily extended for large array applications. We achieve this by integrating all of the required radio frequency (RF) and local oscillator (LO) components on-chip u...
| Main Authors: | , , , |
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| Format: | Conference item |
| Language: | English |
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Society of Photo-Optical Instrumentation Engineers (SPIE)
2022
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| _version_ | 1797107627060101120 |
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| author | Wenninger, J Chaumont, C Boussaha, F Tan, B-K |
| author_facet | Wenninger, J Chaumont, C Boussaha, F Tan, B-K |
| author_sort | Wenninger, J |
| collection | OXFORD |
| description | We report the design of a 230 GHz dual-polarization (2-pol) balanced Superconductor-Insulator-Superconductor
(SIS) receiver that can be easily extended for large array applications. We achieve this by integrating all of the
required radio frequency (RF) and local oscillator (LO) components on-chip using planar superconducting circuit
technology, therefore simplifying the architecture of the receiver block substantially. One major feature of our
design is the planar LO injection scheme, which couples the LO with a single on-chip antenna and distributes
the LO power via a series of microstrip couplers to the balanced mixers of each polarization of each pixel. In this
paper, we describe in detail the design and layout of the individual planar circuit components of our receiver, as
well as how they are integrated to form a full receiver. We then conclude the paper with the design of a 2-pixel
array demonstrator, illustrating how the balanced SIS mixer and the LO distribution network can be extended
to form an even larger array. |
| first_indexed | 2024-03-07T07:18:42Z |
| format | Conference item |
| id | oxford-uuid:a6129a69-55aa-43f8-9069-aae9c931a023 |
| institution | University of Oxford |
| language | English |
| last_indexed | 2024-03-07T07:18:42Z |
| publishDate | 2022 |
| publisher | Society of Photo-Optical Instrumentation Engineers (SPIE) |
| record_format | dspace |
| spelling | oxford-uuid:a6129a69-55aa-43f8-9069-aae9c931a0232022-09-06T11:15:13ZDesign of an on-chip integrated 230 GHz dual-polarization balanced SIS receiver for multi-pixel array applicationsConference itemhttp://purl.org/coar/resource_type/c_5794uuid:a6129a69-55aa-43f8-9069-aae9c931a023EnglishSymplectic ElementsSociety of Photo-Optical Instrumentation Engineers (SPIE)2022Wenninger, JChaumont, CBoussaha, FTan, B-KWe report the design of a 230 GHz dual-polarization (2-pol) balanced Superconductor-Insulator-Superconductor (SIS) receiver that can be easily extended for large array applications. We achieve this by integrating all of the required radio frequency (RF) and local oscillator (LO) components on-chip using planar superconducting circuit technology, therefore simplifying the architecture of the receiver block substantially. One major feature of our design is the planar LO injection scheme, which couples the LO with a single on-chip antenna and distributes the LO power via a series of microstrip couplers to the balanced mixers of each polarization of each pixel. In this paper, we describe in detail the design and layout of the individual planar circuit components of our receiver, as well as how they are integrated to form a full receiver. We then conclude the paper with the design of a 2-pixel array demonstrator, illustrating how the balanced SIS mixer and the LO distribution network can be extended to form an even larger array. |
| spellingShingle | Wenninger, J Chaumont, C Boussaha, F Tan, B-K Design of an on-chip integrated 230 GHz dual-polarization balanced SIS receiver for multi-pixel array applications |
| title | Design of an on-chip integrated 230 GHz dual-polarization balanced SIS receiver for multi-pixel array applications |
| title_full | Design of an on-chip integrated 230 GHz dual-polarization balanced SIS receiver for multi-pixel array applications |
| title_fullStr | Design of an on-chip integrated 230 GHz dual-polarization balanced SIS receiver for multi-pixel array applications |
| title_full_unstemmed | Design of an on-chip integrated 230 GHz dual-polarization balanced SIS receiver for multi-pixel array applications |
| title_short | Design of an on-chip integrated 230 GHz dual-polarization balanced SIS receiver for multi-pixel array applications |
| title_sort | design of an on chip integrated 230 ghz dual polarization balanced sis receiver for multi pixel array applications |
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