Design and Verification of On−Chip Communication Protocols

Design and Verification of On−Chip Communication Protocols

Čájet eará veršuvnnaid (2)

Bibliográfalaš dieđut
Váldodahkkit:	Böhm, P, Melham, T
Materiálatiipa:	Conference item
Almmustuhtton:	ETAPS 2008 2008

Geahča maid

Design and Verification of On−Chip Communication Protocols
Dahkki: Böhm, P, et al.
Almmustuhtton: (2015)

Design and Verification of On−Chip Communication Protocols
Dahkki: Böhm, P, et al.
Almmustuhtton: (2015)

A Refinement Approach to Design and Verification of On−Chip Communication Protocols
Dahkki: Böhm, P, et al.
Almmustuhtton: (2008)

A Refinement Approach to Design and Verification of On−Chip Communication Protocols
Dahkki: Böhm, P, et al.
Almmustuhtton: (2008)

A Refinement Approach to Design and Verification of On-Chip Communication Protocols
Dahkki: Boehm, P, et al.
Almmustuhtton: (2008)

A Framework for Incremental Modelling and Verification of On−Chip Protocols
Dahkki: Böhm, P
Almmustuhtton: (2010)

Verification of System on Chip Integrated Communication Controllers
Dahkki: M. V. Petrochenkov, et al.
Almmustuhtton: (2018-10-01)

Abstraction Mechanisms for Hardware Verification
Dahkki: Melham, T
Almmustuhtton: (1990)

Abstraction Mechanisms for Hardware Verification
Dahkki: Melham, T
Almmustuhtton: (1988)

Abstraction Mechanisms for Hardware Verification
Dahkki: Melham, T
Almmustuhtton: (1987)

Higher Order Logic and Hardware Verification
Dahkki: Melham, T
Almmustuhtton: (1993)

A Formalised Framework for Incremental Modelling of On−Chip Communication
Dahkki: Böhm, P
Almmustuhtton: (2010)

Practical Formal Verification in Microprocessor Design
Dahkki: Jones, R, et al.
Almmustuhtton: (2015)

Abstract: Experience with Practical Formal Verification at an Industrial Scale
Dahkki: Melham, T
Almmustuhtton: (2003)

Relational STE and Theorem Proving for Formal Verification of Industrial Circuit Designs
Dahkki: O'Leary, J, et al.
Almmustuhtton: (2013)

Relational STE and theorem proving for formal verification of industrial circuit designs
Dahkki: O'Leary, J, et al.
Almmustuhtton: (2013)

Formalizing Abstraction Mechanisms for Hardware Verification in Higher Order Logic
Dahkki: Melham, T
Almmustuhtton: (1989)

Contextualizing formal verification for systems security engineering
Dahkki: Shaked, A, et al.
Almmustuhtton: (2024)

An AMBA−ARM7 Formal Verification Platform
Dahkki: Susanto, K, et al.
Almmustuhtton: (2003)

MODELLING AND VERIFICATION OF KITSAT PACKET COMMUNICATION PROTOCOLS
Dahkki: Young-Ro Lee, et al.
Almmustuhtton: (1996-06-01)

Design and post-silicon verification of polymorphic PCIE bridge expansion chip
Dahkki: Deng Jiawei, et al.
Almmustuhtton: (2023-02-01)

Hardware/Software Implementation of a Chip-to-Chip Communication Protocol Based on SPDM
Dahkki: Kais Belwafi, et al.
Almmustuhtton: (2024-01-01)

Hardware verification using software analyzers
Dahkki: Mukherjee, R, et al.
Almmustuhtton: (2015)

Hardware Verification by Formal Proof
Dahkki: Birtwistle, G, et al.
Almmustuhtton: (1988)

Hardware Verification by Formal Proof
Dahkki: Birtwistle, G, et al.
Almmustuhtton: (1988)

Hardware Verification using Higher−Order Logic
Dahkki: Camilleri, A, et al.
Almmustuhtton: (1986)

Hardware Verification using Higher−Order Logic
Dahkki: Camilleri, A, et al.
Almmustuhtton: (1987)

A formal CHERI-C semantics for verification
Dahkki: Park, SH, et al.
Almmustuhtton: (2023)

Microfluidic System Protocols for Integrated On-Chip Communications and Cooling
Dahkki: Stefanus A. Wirdatmadja, et al.
Almmustuhtton: (2017-01-01)

Design and implementation of adaptive and synchronous test function of chip sample verification platform
Dahkki: Xu Jinglin, et al.
Almmustuhtton: (2023-02-01)

An Integrated Digital System Design Framework With On-Chip Functional Verification and Performance Evaluation
Dahkki: German Cano-Quiveu, et al.
Almmustuhtton: (2021-01-01)

Unbounded Safety Verification for Hardware Using Software Analyzers
Dahkki: Mukherjee, R, et al.
Almmustuhtton: (2015)

End-to-end formal verification of a RISC-V processor extended with capability pointers
Dahkki: Gao, D, et al.
Almmustuhtton: (2021)

Method for reducing the complexity of clock domain crossing design and its verification in system-on-chips
Dahkki: Dan LIU, et al.
Almmustuhtton: (2012-11-01)

Method for reducing the complexity of clock domain crossing design and its verification in system-on-chips
Dahkki: Dan LIU, et al.
Almmustuhtton: (2012-11-01)

Verification methods for complex-functional blocks in CAD for chips deep submicron design standards
Dahkki: Zolnikov Vladimir, et al.
Almmustuhtton: (2023-01-01)

Design and verification of adaptive cache coherence protocols
Dahkki: Shen, Xiaowei, 1966-
Almmustuhtton: (2014)

Effective verification for low-level software with competing interrupts
Dahkki: Liang, L, et al.
Almmustuhtton: (2017)

Lifting CDCL to template-based abstract domains for program verification
Dahkki: Mukherjee, R, et al.
Almmustuhtton: (2017)

Verification of an artificial intelligence vision chip design for edge computing based on hardware simulation system
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Almmustuhtton: (2022-03-01)