APA-ийн эшлэл(7 дахь хэвлэлт)

Jain, H., Sharygina, N., Kroening, D., Clarke, E., & Jr, W. (2005). Word level predicate abstraction and refinement for verifying RTL verilog. Association for Computing Machinery.

Чикаго-гийн эшлэл (17 дахь хэвлэлт)

Jain, H., N. Sharygina, D. Kroening, E. Clarke, ба W. Jr. Word Level Predicate Abstraction and Refinement for Verifying RTL Verilog. Association for Computing Machinery, 2005.

MLA -ийн эшлэл (9 дэх хэвлэлт)

Jain, H., et al. Word Level Predicate Abstraction and Refinement for Verifying RTL Verilog. Association for Computing Machinery, 2005.