APA (7e ed.) Bronvermelding

Jain, H., Sharygina, N., Kroening, D., Clarke, E., & Jr, W. (2005). Word level predicate abstraction and refinement for verifying RTL verilog. Association for Computing Machinery.

Chicago (17e ed.) Bronvermelding

Jain, H., N. Sharygina, D. Kroening, E. Clarke, en W. Jr. Word Level Predicate Abstraction and Refinement for Verifying RTL Verilog. Association for Computing Machinery, 2005.

MLA (9e ed.) Bronvermelding

Jain, H., et al. Word Level Predicate Abstraction and Refinement for Verifying RTL Verilog. Association for Computing Machinery, 2005.