Word level predicate abstraction and refinement for verifying RTL verilog

Model checking techniques applied to large industrial circuits suffer from the state space explosion problem. A major technique to address this problem is abstraction. The most commonly used abstraction technique for hardware verification is localization reduction, which removes latches that are not...

সম্পূর্ণ বিবরণ

গ্রন্থ-পঞ্জীর বিবরন
প্রধান লেখক: Jain, H, Sharygina, N, Kroening, D, Clarke, E
অন্যান্য লেখক: Jr, W
বিন্যাস: Conference item
প্রকাশিত: Association for Computing Machinery 2005