Verification of SpecC and Verilog using Predicate Abstraction

Verification of SpecC and Verilog using Predicate Abstraction

Bibliographic Details
Main Authors:	Jain, H, Clarke, E, Kroening, D
Format:	Conference item
Published:	IEEE 2004

Similar Items

Verification of SpecC using Predicate Abstraction
by: Clarke, E, et al.
Published: (2007)

Verification of SpecC using predicate abstraction.
by: Clarke, E, et al.
Published: (2007)

Checking consistency of C and Verilog using predicate abstraction and induction
by: Kroening, D, et al.
Published: (2004)

Checking Consistency of C and Verilog using Predicate Abstraction and Induction
by: Kroening, D, et al.
Published: (2004)

Word Level Predicate Abstraction and Refinement for Verifying RTL Verilog
by: Jain, H, et al.
Published: (2008)

Word Level Predicate Abstraction and Refinement for Verifying RTL Verilog
by: Jain, H, et al.
Published: (2005)

Word level predicate abstraction and refinement for verifying RTL verilog
by: Jain, H, et al.
Published: (2005)

Word-Level Predicate-Abstraction and Refinement Techniques for Verifying RTL Verilog.
by: Jain, H, et al.
Published: (2008)

Word-level predicate-abstraction and refinement rechniques for verifying RTL Verilog
by: Jain, H, et al.
Published: (2008)

VCEGAR: Verilog CounterExample Guided Abstraction Refinement
by: Jain, H, et al.
Published: (2007)

Verification and Falsification of Programs with Loops Using Predicate Abstraction
by: Kroening, D, et al.
Published: (2009)

Verification and falsification of programs with loops using predicate abstraction.
by: Kroening, D, et al.
Published: (2010)

Image Computation and Predicate Refinement for RTL Verilog using Word Level Proofs
by: Kroening, D, et al.
Published: (2007)

Predicate abstraction of ANSI-C programs using SAT
by: Clarke, E, et al.
Published: (2004)

Predicate Abstraction of ANSI-C Programs Using SAT.
by: Clarke, E, et al.
Published: (2004)

Predicate Abstraction of ANSI-C Programs Using SAT
by: Clarke, E, et al.
Published: (2004)

Predicate Abstraction of ANSI–C Programs using SAT
by: Clarke, E, et al.
Published: (2015)

SATABS: SAT−based Predicate Abstraction for ANSI−C
by: Clarke, E, et al.
Published: (2005)

Behavioral Consistency of C and Verilog Programs Using Bounded Model Checking
by: Kroening, D, et al.
Published: (2003)

Counterexamples with Loops for Predicate Abstraction
by: Kroening, D, et al.
Published: (2006)

Verifying C++ with STL Containers via Predicate Abstraction
by: Blanc, N, et al.
Published: (2007)

Verifying C++ with STL containers via predicate abstraction
by: Blanc, N, et al.
Published: (2007)

V2c – A Verilog to C translator
by: Mukherjee, R, et al.
Published: (2016)

Verification methodology manual for SystemVerilog /
by: Bergeron, Janick
Published: (2006)

Build Testbenches for Verification in Shift Register ICs using SystemVerilog
by: Widianto, et al.
Published: (2022-09-01)

Formal Verification at Higher Levels of Abstraction
by: Kroening, D, et al.
Published: (2007)

Hardware verification with SystemVerilog : an object-oriented framework /
by: 272566 Mintz, Mike, et al.
Published: (2007)

Hardware Verification using ANSI−C Programs as a Reference
by: Clarke, E, et al.
Published: (2003)

Hardware verification using ANSI-C programs as a reference
by: Clarke, E, et al.
Published: (2003)

A novel protein SPECC1-415aa encoded by N6-methyladenosine modified circSPECC1 regulates the sensitivity of glioblastoma to TMZ
by: Cheng Wei, et al.
Published: (2024-09-01)

Wu’s Characteristic Set Method for SystemVerilog Assertions Verification
by: Xinyan Gao, et al.
Published: (2013-01-01)

Convex polyhedral abstractions, specialisation and property-based predicate splitting in Horn clause verification
by: Bishoksan Kafle, et al.
Published: (2014-12-01)

SystemVerilog for verification : a guide to learning the testbench language features /
by: 402772 Spear, Chris
Published: (2006)

Groebner Bases Based Verification Solution for SystemVerilog Concurrent Assertions
by: Ning Zhou, et al.
Published: (2014-01-01)

Generative AI Assertions in UVM-Based System Verilog Functional Verification
by: Valentin Radu, et al.
Published: (2024-09-01)

Automated scripts for testing verilog designs with iVerilog
by: Ng, Gary Jia Hao
Published: (2015)

“MoSpec”: A customized and integrated system for model development, verification and validation
by: Marcello Pompa, et al.
Published: (2025-01-01)

"MoSpec": A customized and integrated system for model development, verification and validation.
by: Marcello Pompa, et al.
Published: (2025-01-01)

BCL6-SPECC1L: A Novel Fusion Gene in Nasopharyngeal Carcinoma
by: Shuo-Gui Fang PhD, et al.
Published: (2022-11-01)

Predicate Abstraction with Under-approximation Refinement
by: Corina S. Pasareanu, et al.
Published: (2007-02-01)