Jain, H., Kroening, D., Sharygina, N., & Clarke, E. (2007). VCEGAR: Verilog CounterExample Guided Abstraction Refinement. Springer.
Chicago-čujuhus (17. p.)Jain, H., D. Kroening, N. Sharygina, juo E. Clarke. VCEGAR: Verilog CounterExample Guided Abstraction Refinement. Springer, 2007.
MLA-čujuhus (9. p.)Jain, H., et al. VCEGAR: Verilog CounterExample Guided Abstraction Refinement. Springer, 2007.
Muitte dárkkistit čujuhemiid riektatvuođa, ovdal go geavahat daid iežat deavsttas.