APA引文

Jain, H., Kroening, D., Sharygina, N., & Clarke, E. (2007). VCEGAR: Verilog CounterExample Guided Abstraction Refinement. Springer.

Chicago Style (17th ed.) Citation

Jain, H., D. Kroening, N. Sharygina, and E. Clarke. VCEGAR: Verilog CounterExample Guided Abstraction Refinement. Springer, 2007.

MLA引文

Jain, H., et al. VCEGAR: Verilog CounterExample Guided Abstraction Refinement. Springer, 2007.