APA引文

Jain, H., Kroening, D., Sharygina, N., & Clarke, E. (2007). VCEGAR: Verilog CounterExample Guided Abstraction Refinement. Springer.

芝加哥风格引文

Jain, H., D. Kroening, N. Sharygina, 与 E. Clarke. VCEGAR: Verilog CounterExample Guided Abstraction Refinement. Springer, 2007.

MLA引文

Jain, H., et al. VCEGAR: Verilog CounterExample Guided Abstraction Refinement. Springer, 2007.

警告：这些引文格式不一定是100％准确.