Müller, S., Leister, H., Dell, P., Gerteis, N., Kroening, D., & Cap, C. (1999). The impact of hardware scheduling mechanisms on the performance and cost of processor designs. dblp computer science bibliography.
Чикаго-гийн эшлэл (17 дахь хэвлэлт)Müller, S., H. Leister, P. Dell, N. Gerteis, D. Kroening, ба C. Cap. The Impact of Hardware Scheduling Mechanisms on the Performance and Cost of Processor Designs. dblp computer science bibliography, 1999.
MLA -ийн эшлэл (9 дэх хэвлэлт)Müller, S., et al. The Impact of Hardware Scheduling Mechanisms on the Performance and Cost of Processor Designs. dblp computer science bibliography, 1999.
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