The impact of hardware scheduling mechanisms on the performance and cost of processor designs

The impact of hardware scheduling mechanisms on the performance and cost of processor designs

Show other versions (1)

Hardware schedulers supporting out-of-order execution are widespread nowadays. Nevertheless, studies quantifying the impact of schedulers on the performance and cost of processors are rare. The paper tries to close this gap. It turns out that the hardware schedulers can double the performance at a m...

书目详细资料
Main Authors:	Müller, S, Leister, H, Dell, P, Gerteis, N, Kroening, D
其他作者:	Cap, C
格式:	Conference item
出版:	dblp computer science bibliography 1999

相似书籍

The Impact of Hardware Scheduling Mechanisms on the Performance and Cost of Processor Designs.
由: Mueller, S, et al.
出版: (1999)

Dedicated digital processors : methods in hardware/software system design /
由: 276644 Mayer-Lindenberg, F.
出版: (2004)

A Hardware Assembler for 8080 Processor
由: D. I. Cowie
出版: (1978-04-01)

Exploring Optimal Cost-Performance Designs for RAW processors
由: Moritz, Csaba Andras, et al.
出版: (2023)

APRON: A Cellular Processor Array Simulation and Hardware Design Tool
由: David R. W. Barr, et al.
出版: (2009-01-01)

Tao--an architecturally balanced reconfigurable hardware processor
由: Huang, Andrew S. (Andrew Shane)
出版: (2005)

Thread Scheduling Mechanisms for Multiple-Context Parallel Processors
由: Fiske, James A. Stuart
出版: (2004)

Thread scheduling mechanisms for multiple-context parallel processors
由: Fiske, James Alexander Stuart
出版: (2007)

Scheduling jobs on multi-processors
由: Neetika, Bansal
出版: (2012)

OKI advanced array processor (AAP) hardware description
出版: (2004)

Digital neural processor hardware implementation for character recognition /
由: 424809 Kumaara Velan Munusamy
出版: (2000)

The 80386, 80486 and pentium processor : hardware, software and interfacing /
由: 391611 Triebel, Walter A.
出版: (1998)

Algorithms for Scheduling Tasks on Unrelated Processors
由: Davis, Ernest, et al.
出版: (2023)

Optimal scheduling for two-processor systems /
由: Coffman, E. G. (Edward Grady), 1934-, et al.

Task scheduling in parallel processor systems /
由: 443850 Syarifah Zyurina Nordin
出版: (2011)

Static Scheduling of Periodic Hardware Tasks with Precedence and Deadline Constraints on Reconfigurable Hardware Devices
由: Ikbel Belaid, et al.
出版: (2011-01-01)

Scheduling Algorithm: Tasks Scheduling Algorithm for Multiple Processors with Dynamic Reassignment
由: Pradeep Kumar Yadav, et al.
出版: (2008-01-01)

Power Saving for Hardware Accelerated Applications With Dynamical Processor Switching
由: Ko Natori, et al.
出版: (2024-01-01)

Scheduling for hardware/software partitioning in embedded system design
由: Engels, Daniel Wayne, 1970-
出版: (2014)

Register transfer level design of compression processor core using verilog hardware description language /
由: Roslee Mohd. Sabri, 1978-, et al.
出版: (2007)

Co-design of Compiler and Hardware Techniques to Reduce Program Code Size on a VLIW Processor
由: Eric J. Stotzer, et al.
出版: (2012-08-01)

Modelling and developing co-scheduling strategies on multicore processors
由: Zhu, H, et al.
出版: (2015)

Median filter using altera nios II processor and sort hardware /
由: 267473 Nadiah Azmi, et al.
出版: (2008)

Median filter using nios II processor with sort hardware accelerator /
由: Chen, Kah Yee, 198- , author, et al.
出版: (2009)

Accelerating Population Count with a Hardware Co-Processor for MicroBlaze
由: Iouliia Skliarova
出版: (2021-04-01)

Hardware Implementation of Residue Multipliers based Signed RNS Processor for Cryptosystems
由: E. Sekar, et al.
出版: (2020-09-01)

Modern processor design : fundamentals of superscalar processors /
由: 204626 Shen, John Paul, et al.
出版: (2005)

Modern processor design : fundamentals of superscalar processors /
由: 204626 Shen, John Paul, et al.
出版: (2003)

Three Processor Allocation Approaches towards EDF Scheduling for Performance Asymmetric Multiprocessors
由: Peng Wu, et al.
出版: (2023-04-01)

Automatic analysis of scratch-pad memory code for heterogeneous multicore processors
由: Donaldson, A, et al.
出版: (2010)

Proving the Correctness of Processors with Delayed Branch using Delayed PC
由: Mueller, S, et al.
出版: (2000)

Performance Characterization of Hardware/Software Communication Interfaces in End-to-End Power Management Solutions of High-Performance Computing Processors
由: Antonio del Vecchio, et al.
出版: (2024-11-01)

SCHEDULING PROBLEMS OF STATIONARY OBJECTS WITH THE PROCESSOR IN ONE-DIMENSIONAL ZONE
由: N. A. Dunichkina, et al.
出版: (2015-06-01)

Formal techniques for effective co-verification of hardware/software co-designs
由: Mukherjee, R, et al.
出版: (2017)

A Self-Checking Hardware Journal for a Fault-Tolerant Processor Architecture
由: Mohsin Amin, et al.
出版: (2011-01-01)

Hardware-Based Implementation of Algorithms for Data Replacement in Cache Memory of Processor Cores
由: Larysa Titarenko, et al.
出版: (2024-07-01)

Gradient-descent hardware-aware training and deployment for mixed-signal neuromorphic processors
由: Ugurcan Cakal, et al.
出版: (2024-01-01)

Hardware Prototyping and Validation of a W-ΔDOR Digital Signal Processor
由: Gian Carlo Cardarilli, et al.
出版: (2019-07-01)

Efficient Hardware Implementation of Large Field-Size Elliptic Curve Cryptographic Processor
由: Chiou-Yng Lee, et al.
出版: (2022-01-01)

Scheduling of Batch Processors in Semiconductor Manufacturing – A Review
由: Mathirajan, M., et al.
出版: (2003)