A 0.13μm inductively degenerated cascode CMOS LNA at 2.14GHz
A 130-nm CMOS low-noise amplifier (LNA) for WCDMA applications is presented. The circuit adopts an inductively degenerated cascode topology. A detailed methodology using power constraint noise optimization (PCNO) method that leads to an optimum width of the LNA is presented. A theoretical noise fi...
| Main Authors: | , , , , |
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| Format: | Conference or Workshop Item |
| Language: | English |
| Published: |
2011
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| Subjects: | |
| Online Access: | http://eprints.um.edu.my/12819/1/A_0.13%CE%BCm_Inductively_Degenerated.pdf |
| Summary: | A 130-nm CMOS low-noise amplifier (LNA) for WCDMA applications is presented. The circuit adopts an inductively
degenerated cascode topology. A detailed methodology using power constraint noise optimization (PCNO) method that leads
to an optimum width of the LNA is presented. A theoretical noise figure optimization using fixed power was used as a
design optimization guide. This inductively degenerated cascade topology show good noise performance which it achieve a noise figure of 1.32dB while provides a forward gain, S21 of 18.24 dB from a 1.2V voltage supply. The input reflection coefficient, S11 is -19 dB. |
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