A 0.13μm inductively degenerated cascode CMOS LNA at 2.14GHz
A 130-nm CMOS low-noise amplifier (LNA) for WCDMA applications is presented. The circuit adopts an inductively degenerated cascode topology. A detailed methodology using power constraint noise optimization (PCNO) method that leads to an optimum width of the LNA is presented. A theoretical noise fi...
| Main Authors: | , , , , |
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| Format: | Conference or Workshop Item |
| Language: | English |
| Published: |
2011
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| Subjects: | |
| Online Access: | http://eprints.um.edu.my/12819/1/A_0.13%CE%BCm_Inductively_Degenerated.pdf |
| _version_ | 1825720241877942272 |
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| author | Muhamad, M. Soin, N. Ramiah, H. Noh, N.M. Keat, C.W. |
| author_facet | Muhamad, M. Soin, N. Ramiah, H. Noh, N.M. Keat, C.W. |
| author_sort | Muhamad, M. |
| collection | UM |
| description | A 130-nm CMOS low-noise amplifier (LNA) for WCDMA applications is presented. The circuit adopts an inductively
degenerated cascode topology. A detailed methodology using power constraint noise optimization (PCNO) method that leads
to an optimum width of the LNA is presented. A theoretical noise figure optimization using fixed power was used as a
design optimization guide. This inductively degenerated cascade topology show good noise performance which it achieve a noise figure of 1.32dB while provides a forward gain, S21 of 18.24 dB from a 1.2V voltage supply. The input reflection coefficient, S11 is -19 dB. |
| first_indexed | 2024-03-06T05:32:08Z |
| format | Conference or Workshop Item |
| id | um.eprints-12819 |
| institution | Universiti Malaya |
| language | English |
| last_indexed | 2024-03-06T05:32:08Z |
| publishDate | 2011 |
| record_format | dspace |
| spelling | um.eprints-128192015-02-18T06:16:46Z http://eprints.um.edu.my/12819/ A 0.13μm inductively degenerated cascode CMOS LNA at 2.14GHz Muhamad, M. Soin, N. Ramiah, H. Noh, N.M. Keat, C.W. TA Engineering (General). Civil engineering (General) A 130-nm CMOS low-noise amplifier (LNA) for WCDMA applications is presented. The circuit adopts an inductively degenerated cascode topology. A detailed methodology using power constraint noise optimization (PCNO) method that leads to an optimum width of the LNA is presented. A theoretical noise figure optimization using fixed power was used as a design optimization guide. This inductively degenerated cascade topology show good noise performance which it achieve a noise figure of 1.32dB while provides a forward gain, S21 of 18.24 dB from a 1.2V voltage supply. The input reflection coefficient, S11 is -19 dB. 2011-09 Conference or Workshop Item PeerReviewed application/pdf en http://eprints.um.edu.my/12819/1/A_0.13%CE%BCm_Inductively_Degenerated.pdf Muhamad, M. and Soin, N. and Ramiah, H. and Noh, N.M. and Keat, C.W. (2011) A 0.13μm inductively degenerated cascode CMOS LNA at 2.14GHz. In: 2011 IEEE Symposium on Industrial Electronics and Applications, ISIEA 2011, 25-28 Sep 2011, Langkawi. |
| spellingShingle | TA Engineering (General). Civil engineering (General) Muhamad, M. Soin, N. Ramiah, H. Noh, N.M. Keat, C.W. A 0.13μm inductively degenerated cascode CMOS LNA at 2.14GHz |
| title | A 0.13μm inductively degenerated cascode CMOS
LNA at 2.14GHz |
| title_full | A 0.13μm inductively degenerated cascode CMOS
LNA at 2.14GHz |
| title_fullStr | A 0.13μm inductively degenerated cascode CMOS
LNA at 2.14GHz |
| title_full_unstemmed | A 0.13μm inductively degenerated cascode CMOS
LNA at 2.14GHz |
| title_short | A 0.13μm inductively degenerated cascode CMOS
LNA at 2.14GHz |
| title_sort | 0 13μm inductively degenerated cascode cmos lna at 2 14ghz |
| topic | TA Engineering (General). Civil engineering (General) |
| url | http://eprints.um.edu.my/12819/1/A_0.13%CE%BCm_Inductively_Degenerated.pdf |
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