Buck and boost converter design optimization parameters in modern VLSI technology
This paper presents the feasibility challenges of designing dc-dc buck and boost converter in nano-scale. With the gradual development of VLSI design platforms, new issues have been introduced and presented to the power electronics circuit experts and VLSI engineers. Today's VLSI industry has r...
| Main Authors: | , , , |
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| Format: | Conference or Workshop Item |
| Language: | English |
| Published: |
2011
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| Subjects: | |
| Online Access: | http://eprints.um.edu.my/4776/1/Buck_and_boost_converter_design_optimization_parameters_in_modern_VLSI_technology.pdf |
| _version_ | 1825718993329061888 |
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| author | Iqbal, S.M.A. Mekhilef, Saad Soin, N. Omar, R. |
| author_facet | Iqbal, S.M.A. Mekhilef, Saad Soin, N. Omar, R. |
| author_sort | Iqbal, S.M.A. |
| collection | UM |
| description | This paper presents the feasibility challenges of designing dc-dc buck and boost converter in nano-scale. With the gradual development of VLSI design platforms, new issues have been introduced and presented to the power electronics circuit experts and VLSI engineers. Today's VLSI industry has reached the technology well within the nano-meter range. The consequence of implementing the basic power electronics converter topology such as buck and boost converter into this technology is discussed in this paper. It also covers the optimization issues between conduction modes, switching frequencies, efficiency and chip area. Fabrication issues are discussed, with the limitations of use of elements such as inductor, capacitors and resistors. Tradeoffs between chip area and performance are highlighted. Design challenge for optimum switching frequency, off the chip capacitor, and strategies to minimize switching and conduction losses are also discussed. |
| first_indexed | 2024-03-06T05:12:51Z |
| format | Conference or Workshop Item |
| id | um.eprints-4776 |
| institution | Universiti Malaya |
| language | English |
| last_indexed | 2024-03-06T05:12:51Z |
| publishDate | 2011 |
| record_format | dspace |
| spelling | um.eprints-47762019-10-25T04:02:09Z http://eprints.um.edu.my/4776/ Buck and boost converter design optimization parameters in modern VLSI technology Iqbal, S.M.A. Mekhilef, Saad Soin, N. Omar, R. TA Engineering (General). Civil engineering (General) TK Electrical engineering. Electronics Nuclear engineering This paper presents the feasibility challenges of designing dc-dc buck and boost converter in nano-scale. With the gradual development of VLSI design platforms, new issues have been introduced and presented to the power electronics circuit experts and VLSI engineers. Today's VLSI industry has reached the technology well within the nano-meter range. The consequence of implementing the basic power electronics converter topology such as buck and boost converter into this technology is discussed in this paper. It also covers the optimization issues between conduction modes, switching frequencies, efficiency and chip area. Fabrication issues are discussed, with the limitations of use of elements such as inductor, capacitors and resistors. Tradeoffs between chip area and performance are highlighted. Design challenge for optimum switching frequency, off the chip capacitor, and strategies to minimize switching and conduction losses are also discussed. 2011 Conference or Workshop Item PeerReviewed application/pdf en http://eprints.um.edu.my/4776/1/Buck_and_boost_converter_design_optimization_parameters_in_modern_VLSI_technology.pdf Iqbal, S.M.A. and Mekhilef, Saad and Soin, N. and Omar, R. (2011) Buck and boost converter design optimization parameters in modern VLSI technology. In: 12th International Conference and Seminar on Micro/Nanotechnologies and Electron Devices, EDM'2011, Erlagol, Altai. http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=6006912 |
| spellingShingle | TA Engineering (General). Civil engineering (General) TK Electrical engineering. Electronics Nuclear engineering Iqbal, S.M.A. Mekhilef, Saad Soin, N. Omar, R. Buck and boost converter design optimization parameters in modern VLSI technology |
| title | Buck and boost converter design optimization parameters in modern VLSI technology |
| title_full | Buck and boost converter design optimization parameters in modern VLSI technology |
| title_fullStr | Buck and boost converter design optimization parameters in modern VLSI technology |
| title_full_unstemmed | Buck and boost converter design optimization parameters in modern VLSI technology |
| title_short | Buck and boost converter design optimization parameters in modern VLSI technology |
| title_sort | buck and boost converter design optimization parameters in modern vlsi technology |
| topic | TA Engineering (General). Civil engineering (General) TK Electrical engineering. Electronics Nuclear engineering |
| url | http://eprints.um.edu.my/4776/1/Buck_and_boost_converter_design_optimization_parameters_in_modern_VLSI_technology.pdf |
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