40 Gbit/s on-off-keyed system with 5.71 GHz clock recovery circuit using duty cycle division multiplexing
We show the realization of 40 Gbit/s on-off-keyed system that can be recovered at 5.71 GHz clock using duty cycle division multiplexing technique with the receiver sensitivity of -22.1 dBm. ©2008 Optical Society of America.
| Main Authors: | , , , |
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| Format: | Conference or Workshop Item |
| Language: | English |
| Published: |
2009
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| Subjects: | |
| Online Access: | http://eprints.um.edu.my/6220/1/40_Gbits_on-off-keyed_system_with_5.71_GHz_clock_recovery_circuit_using_duty_cycle_division_multiplexing.pdf |
| _version_ | 1825719213822574592 |
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| author | Amouzad Mahdiraji, G. Malekmohammadi, A. Fauzi Abas, A. Khazani Abdullah, M. |
| author_facet | Amouzad Mahdiraji, G. Malekmohammadi, A. Fauzi Abas, A. Khazani Abdullah, M. |
| author_sort | Amouzad Mahdiraji, G. |
| collection | UM |
| description | We show the realization of 40 Gbit/s on-off-keyed system that can be recovered at 5.71 GHz clock using duty cycle division multiplexing technique with the receiver sensitivity of -22.1 dBm. ©2008 Optical Society of America. |
| first_indexed | 2024-03-06T05:16:15Z |
| format | Conference or Workshop Item |
| id | um.eprints-6220 |
| institution | Universiti Malaya |
| language | English |
| last_indexed | 2024-03-06T05:16:15Z |
| publishDate | 2009 |
| record_format | dspace |
| spelling | um.eprints-62202013-07-02T01:17:36Z http://eprints.um.edu.my/6220/ 40 Gbit/s on-off-keyed system with 5.71 GHz clock recovery circuit using duty cycle division multiplexing Amouzad Mahdiraji, G. Malekmohammadi, A. Fauzi Abas, A. Khazani Abdullah, M. TA Engineering (General). Civil engineering (General) TK Electrical engineering. Electronics Nuclear engineering We show the realization of 40 Gbit/s on-off-keyed system that can be recovered at 5.71 GHz clock using duty cycle division multiplexing technique with the receiver sensitivity of -22.1 dBm. ©2008 Optical Society of America. 2009 Conference or Workshop Item PeerReviewed application/pdf en http://eprints.um.edu.my/6220/1/40_Gbits_on-off-keyed_system_with_5.71_GHz_clock_recovery_circuit_using_duty_cycle_division_multiplexing.pdf Amouzad Mahdiraji, G. and Malekmohammadi, A. and Fauzi Abas, A. and Khazani Abdullah, M. (2009) 40 Gbit/s on-off-keyed system with 5.71 GHz clock recovery circuit using duty cycle division multiplexing. In: 2009 Asia Communications and Photonics Conference and Exhibition, ACP 2009, 2009, Shanghai. http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=5405301 |
| spellingShingle | TA Engineering (General). Civil engineering (General) TK Electrical engineering. Electronics Nuclear engineering Amouzad Mahdiraji, G. Malekmohammadi, A. Fauzi Abas, A. Khazani Abdullah, M. 40 Gbit/s on-off-keyed system with 5.71 GHz clock recovery circuit using duty cycle division multiplexing |
| title | 40 Gbit/s on-off-keyed system with 5.71 GHz clock recovery circuit using duty cycle division multiplexing |
| title_full | 40 Gbit/s on-off-keyed system with 5.71 GHz clock recovery circuit using duty cycle division multiplexing |
| title_fullStr | 40 Gbit/s on-off-keyed system with 5.71 GHz clock recovery circuit using duty cycle division multiplexing |
| title_full_unstemmed | 40 Gbit/s on-off-keyed system with 5.71 GHz clock recovery circuit using duty cycle division multiplexing |
| title_short | 40 Gbit/s on-off-keyed system with 5.71 GHz clock recovery circuit using duty cycle division multiplexing |
| title_sort | 40 gbit s on off keyed system with 5 71 ghz clock recovery circuit using duty cycle division multiplexing |
| topic | TA Engineering (General). Civil engineering (General) TK Electrical engineering. Electronics Nuclear engineering |
| url | http://eprints.um.edu.my/6220/1/40_Gbits_on-off-keyed_system_with_5.71_GHz_clock_recovery_circuit_using_duty_cycle_division_multiplexing.pdf |
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