Investigation on pattern based Algorithm for division by a constant number using Verilog code for optimization on the Nelust results
Even though sophisticated synthesis strategies are used for optimization (e.g. area and power consumption), the quality of the result heavily depends on the quality of the Register Transfer Level (RTL). For multiplication and division by a constant number that is power of 2 can be done using left sh...
| Հիմնական հեղինակներ: | , , , |
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| Ձևաչափ: | Research Report |
| Լեզու: | English |
| Հրապարակվել է: |
Universiti Malaysia Sabah
2015
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| Խորագրեր: | |
| Առցանց հասանելիություն: | https://eprints.ums.edu.my/id/eprint/22892/1/Investigation%20on%20pattern%20based%20Algorithm%20for%20division%20by%20a%20constant%20number%20using%20Verilog%20code%20for%20optimization%20on%20the%20Nelust%20results.pdf |