Emerging nanoelectronics device design exploration incorporating vertical impact-ionization mosfet and strained (SiGe) technology
Miniaturization of semiconductor devices beyond sub-lO0nm has commenced several problems for further scaling. Low subthreshold voltage, reduced carrier mobility, and increased leakage currents were identified to be the paramount issues that leads to high power consumption and heating. The Impact Ion...
Main Author: | Ismail Saad |
---|---|
Format: | Research Report |
Language: | English |
Published: |
Universiti Malaysia Sabah
2013
|
Subjects: | |
Online Access: | https://eprints.ums.edu.my/id/eprint/24974/1/Emerging%20nanoelectronics%20device%20design%20exploration%20incorporating%20vertical%20impact-ionization%20mosfet%20and%20strained%20%28SiGe%29%20technology.pdf |
Similar Items
-
Design and simulation of Vertical Strained SiGe Impact Ionization Mosfet (VESIMOS)
by: Divya Yadav Pogaku
Published: (2011) -
Enhanced reliability of vertical strained impact ionization MOSFET incorporating dielectric pocket for ultra-sensitive biosensor applications
by: Ismail Saad, et al.
Published: (2017) -
Organic-inorganic PTAA-SiGe transparent optical materials performance analysis for photo device applications
by: Nasir, Syafiqa, et al.
Published: (2024) -
Vertical Strained Impact Ionization MOSFET (VESIMOS) Technology Approach for Based Biosensor Applications using its Behavioral Model
by: Ismail Saad, et al.
Published: (2017) -
Nanoscale strained-Si/SiGe and double-gate MOSFET modeling
by: Karthik Chandrasekaran
Published: (2010)