Design of a reconfigurable FFT processor using multi-objective genetic algorithm
This paper describes the implementation of Multi-objective Genetic Algorithm (MOGA) in a 16-point Radix-4 Single Path Delay Feedback (R4SDF) pipelined Fast Fourier Transform (FFT) processor in Verilog. The role of MOGA is to optimize the wordlength of the FFT coefficient and at the same time make su...
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| Format: | Conference or Workshop Item |
| Language: | English |
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IEEE
2010
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| Online Access: | http://psasir.upm.edu.my/id/eprint/47776/1/Design%20of%20a%20reconfigurable%20FFT%20processor%20using%20multi-objective%20genetic%20algorithm.pdf |
| _version_ | 1796974854364200960 |
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| author | Pang, Jia Hong Sulaiman, Nasri |
| author_facet | Pang, Jia Hong Sulaiman, Nasri |
| author_sort | Pang, Jia Hong |
| collection | UPM |
| description | This paper describes the implementation of Multi-objective Genetic Algorithm (MOGA) in a 16-point Radix-4 Single Path Delay Feedback (R4SDF) pipelined Fast Fourier Transform (FFT) processor in Verilog. The role of MOGA is to optimize the wordlength of the FFT coefficient and at the same time make sure the processor operates at acceptable Signal to Noise Ratio (SNR). Reducing the wordlength of FFT coefficient will contribute to lower Switching Activity (SA), thus lower power consumption is required for the operation of FFT processor. |
| first_indexed | 2024-03-06T09:03:05Z |
| format | Conference or Workshop Item |
| id | upm.eprints-47776 |
| institution | Universiti Putra Malaysia |
| language | English |
| last_indexed | 2024-03-06T09:03:05Z |
| publishDate | 2010 |
| publisher | IEEE |
| record_format | dspace |
| spelling | upm.eprints-477762016-07-15T05:24:30Z http://psasir.upm.edu.my/id/eprint/47776/ Design of a reconfigurable FFT processor using multi-objective genetic algorithm Pang, Jia Hong Sulaiman, Nasri This paper describes the implementation of Multi-objective Genetic Algorithm (MOGA) in a 16-point Radix-4 Single Path Delay Feedback (R4SDF) pipelined Fast Fourier Transform (FFT) processor in Verilog. The role of MOGA is to optimize the wordlength of the FFT coefficient and at the same time make sure the processor operates at acceptable Signal to Noise Ratio (SNR). Reducing the wordlength of FFT coefficient will contribute to lower Switching Activity (SA), thus lower power consumption is required for the operation of FFT processor. IEEE 2010 Conference or Workshop Item PeerReviewed application/pdf en http://psasir.upm.edu.my/id/eprint/47776/1/Design%20of%20a%20reconfigurable%20FFT%20processor%20using%20multi-objective%20genetic%20algorithm.pdf Pang, Jia Hong and Sulaiman, Nasri (2010) Design of a reconfigurable FFT processor using multi-objective genetic algorithm. In: International Conference on Intelligent and Advanced Systems (ICIAS 2010), 15-17 June 2010, Kuala Lumpur, Malaysia. . 10.1109/ICIAS.2010.5716157 |
| spellingShingle | Pang, Jia Hong Sulaiman, Nasri Design of a reconfigurable FFT processor using multi-objective genetic algorithm |
| title | Design of a reconfigurable FFT processor using multi-objective genetic algorithm |
| title_full | Design of a reconfigurable FFT processor using multi-objective genetic algorithm |
| title_fullStr | Design of a reconfigurable FFT processor using multi-objective genetic algorithm |
| title_full_unstemmed | Design of a reconfigurable FFT processor using multi-objective genetic algorithm |
| title_short | Design of a reconfigurable FFT processor using multi-objective genetic algorithm |
| title_sort | design of a reconfigurable fft processor using multi objective genetic algorithm |
| url | http://psasir.upm.edu.my/id/eprint/47776/1/Design%20of%20a%20reconfigurable%20FFT%20processor%20using%20multi-objective%20genetic%20algorithm.pdf |
| work_keys_str_mv | AT pangjiahong designofareconfigurablefftprocessorusingmultiobjectivegeneticalgorithm AT sulaimannasri designofareconfigurablefftprocessorusingmultiobjectivegeneticalgorithm |