An FPGA implementation and performance analysis between radix-2 and radix-4 of 4096 point FFT
The rapid grown in wireless 4G and 5G technology push to the edge to high input data processing. High input data processing required advance Orthogonal Frequency Division Multiplexing (OFDM). The main block in any OFDM transceiver is the Fast Fourier Transform (FFT). FFT consider the transformation...
| Main Authors: | , , , , |
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| Format: | Conference or Workshop Item |
| Language: | English |
| Published: |
IEEE
2018
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| Online Access: | http://psasir.upm.edu.my/id/eprint/68246/1/An%20FPGA%20implementation%20and%20performance%20analysis%20between%20radix-2%20and%20radix-4%20of%204096%20point%20FFT.pdf |
| _version_ | 1825933488965025792 |
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| author | Abbas, Zaid Ali Sulaiman, Nasri Md Yunus, Nurul Amziah Wan Hasan, Wan Zuha Ahmed, Mohammed K. |
| author_facet | Abbas, Zaid Ali Sulaiman, Nasri Md Yunus, Nurul Amziah Wan Hasan, Wan Zuha Ahmed, Mohammed K. |
| author_sort | Abbas, Zaid Ali |
| collection | UPM |
| description | The rapid grown in wireless 4G and 5G technology push to the edge to high input data processing. High input data processing required advance Orthogonal Frequency Division Multiplexing (OFDM). The main block in any OFDM transceiver is the Fast Fourier Transform (FFT). FFT consider the transformation bridge between the time and frequency domains. In this research an implementation and direct analysis between radix-2 and radix-4 FFT algorithms presented. Memory-based architecture adopted for the all algorithms. The entire algorithm designed by Altera Quartus II and synthesis for Altera DE2-70 field programmable gate arrays (FPGA) board, in order to investigate and determine the desired algorithm based on the application used for and the system requirement. |
| first_indexed | 2024-03-06T09:58:03Z |
| format | Conference or Workshop Item |
| id | upm.eprints-68246 |
| institution | Universiti Putra Malaysia |
| language | English |
| last_indexed | 2024-03-06T09:58:03Z |
| publishDate | 2018 |
| publisher | IEEE |
| record_format | dspace |
| spelling | upm.eprints-682462019-05-10T08:27:50Z http://psasir.upm.edu.my/id/eprint/68246/ An FPGA implementation and performance analysis between radix-2 and radix-4 of 4096 point FFT Abbas, Zaid Ali Sulaiman, Nasri Md Yunus, Nurul Amziah Wan Hasan, Wan Zuha Ahmed, Mohammed K. The rapid grown in wireless 4G and 5G technology push to the edge to high input data processing. High input data processing required advance Orthogonal Frequency Division Multiplexing (OFDM). The main block in any OFDM transceiver is the Fast Fourier Transform (FFT). FFT consider the transformation bridge between the time and frequency domains. In this research an implementation and direct analysis between radix-2 and radix-4 FFT algorithms presented. Memory-based architecture adopted for the all algorithms. The entire algorithm designed by Altera Quartus II and synthesis for Altera DE2-70 field programmable gate arrays (FPGA) board, in order to investigate and determine the desired algorithm based on the application used for and the system requirement. IEEE 2018 Conference or Workshop Item PeerReviewed text en http://psasir.upm.edu.my/id/eprint/68246/1/An%20FPGA%20implementation%20and%20performance%20analysis%20between%20radix-2%20and%20radix-4%20of%204096%20point%20FFT.pdf Abbas, Zaid Ali and Sulaiman, Nasri and Md Yunus, Nurul Amziah and Wan Hasan, Wan Zuha and Ahmed, Mohammed K. (2018) An FPGA implementation and performance analysis between radix-2 and radix-4 of 4096 point FFT. In: 2018 IEEE 5th International Conference on Smart Instrumentation, Measurement and Applications (ICSIMA 2018), 28-30 Nov. 2018, Songkla, Thailand. . 10.1109/ICSIMA.2018.8688777 |
| spellingShingle | Abbas, Zaid Ali Sulaiman, Nasri Md Yunus, Nurul Amziah Wan Hasan, Wan Zuha Ahmed, Mohammed K. An FPGA implementation and performance analysis between radix-2 and radix-4 of 4096 point FFT |
| title | An FPGA implementation and performance analysis between radix-2 and radix-4 of 4096 point FFT |
| title_full | An FPGA implementation and performance analysis between radix-2 and radix-4 of 4096 point FFT |
| title_fullStr | An FPGA implementation and performance analysis between radix-2 and radix-4 of 4096 point FFT |
| title_full_unstemmed | An FPGA implementation and performance analysis between radix-2 and radix-4 of 4096 point FFT |
| title_short | An FPGA implementation and performance analysis between radix-2 and radix-4 of 4096 point FFT |
| title_sort | fpga implementation and performance analysis between radix 2 and radix 4 of 4096 point fft |
| url | http://psasir.upm.edu.my/id/eprint/68246/1/An%20FPGA%20implementation%20and%20performance%20analysis%20between%20radix-2%20and%20radix-4%20of%204096%20point%20FFT.pdf |
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