FPGA implementation of the proposed DSI-SLM scheme for PAPR reduction in OFDM systems

High peak to average power ratio (PAPR) is the main drawback of orthogonal frequency division multiplexing (OFDM) systems. Some of the proposed PAPR reduction solutions are dummy insertion (DSI), selected mapping (SLM) and combined DSI-SLM scheme. This paper presents FPGA implementation of DSI-SLM s...

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Main Authors: Mohammady, Somayeh, Mohd Sidek, Roslina, Varahram, Pooria, Hamidon, Mohd Nizar, Sulaiman, Nasri
Format: Conference or Workshop Item
Language:English
Published: IEEE 2011
Online Access:http://psasir.upm.edu.my/id/eprint/68248/1/FPGA%20implementation%20of%20the%20proposed%20DSI-SLM%20scheme%20for%20PAPR%20reduction%20in%20OFDM%20systems.pdf
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author Mohammady, Somayeh
Mohd Sidek, Roslina
Varahram, Pooria
Hamidon, Mohd Nizar
Sulaiman, Nasri
author_facet Mohammady, Somayeh
Mohd Sidek, Roslina
Varahram, Pooria
Hamidon, Mohd Nizar
Sulaiman, Nasri
author_sort Mohammady, Somayeh
collection UPM
description High peak to average power ratio (PAPR) is the main drawback of orthogonal frequency division multiplexing (OFDM) systems. Some of the proposed PAPR reduction solutions are dummy insertion (DSI), selected mapping (SLM) and combined DSI-SLM scheme. This paper presents FPGA implementation of DSI-SLM scheme for OFDM signals. The results of the implementation and simulation are compared which show that the PAPR is almost the same as simulation results. The hardware resource consumption of the DSI-SLM method is estimated to be at least 4 times less than conventional SLM (C-SLM) method with comparable PAPR performance.
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spelling upm.eprints-682482019-05-10T08:28:02Z http://psasir.upm.edu.my/id/eprint/68248/ FPGA implementation of the proposed DSI-SLM scheme for PAPR reduction in OFDM systems Mohammady, Somayeh Mohd Sidek, Roslina Varahram, Pooria Hamidon, Mohd Nizar Sulaiman, Nasri High peak to average power ratio (PAPR) is the main drawback of orthogonal frequency division multiplexing (OFDM) systems. Some of the proposed PAPR reduction solutions are dummy insertion (DSI), selected mapping (SLM) and combined DSI-SLM scheme. This paper presents FPGA implementation of DSI-SLM scheme for OFDM signals. The results of the implementation and simulation are compared which show that the PAPR is almost the same as simulation results. The hardware resource consumption of the DSI-SLM method is estimated to be at least 4 times less than conventional SLM (C-SLM) method with comparable PAPR performance. IEEE 2011 Conference or Workshop Item PeerReviewed text en http://psasir.upm.edu.my/id/eprint/68248/1/FPGA%20implementation%20of%20the%20proposed%20DSI-SLM%20scheme%20for%20PAPR%20reduction%20in%20OFDM%20systems.pdf Mohammady, Somayeh and Mohd Sidek, Roslina and Varahram, Pooria and Hamidon, Mohd Nizar and Sulaiman, Nasri (2011) FPGA implementation of the proposed DSI-SLM scheme for PAPR reduction in OFDM systems. In: 17th Asia-Pacific Conference on Communications (APCC 2011), 2-5 Oct. 2011, Sutera Harbour Resort, Kota Kinabalu, Sabah, Malaysia. (pp. 484-487). 10.1109/APCC.2011.6152857
spellingShingle Mohammady, Somayeh
Mohd Sidek, Roslina
Varahram, Pooria
Hamidon, Mohd Nizar
Sulaiman, Nasri
FPGA implementation of the proposed DSI-SLM scheme for PAPR reduction in OFDM systems
title FPGA implementation of the proposed DSI-SLM scheme for PAPR reduction in OFDM systems
title_full FPGA implementation of the proposed DSI-SLM scheme for PAPR reduction in OFDM systems
title_fullStr FPGA implementation of the proposed DSI-SLM scheme for PAPR reduction in OFDM systems
title_full_unstemmed FPGA implementation of the proposed DSI-SLM scheme for PAPR reduction in OFDM systems
title_short FPGA implementation of the proposed DSI-SLM scheme for PAPR reduction in OFDM systems
title_sort fpga implementation of the proposed dsi slm scheme for papr reduction in ofdm systems
url http://psasir.upm.edu.my/id/eprint/68248/1/FPGA%20implementation%20of%20the%20proposed%20DSI-SLM%20scheme%20for%20PAPR%20reduction%20in%20OFDM%20systems.pdf
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