FPGA implementation of low complexity crest factor reduction in OFDM systems

FPGA implementation of low complexity crest factor reduction in OFDM systems

Orthogonal Frequency Division Multiplexing (OFDM) systems have a main drawback known as high Peak to Average Power Ratio (PAPR) or Crest Factor (CF). The main PAPR reduction techniques are Partial Transmit Sequence (PTS), Dummy Sequence Insertion (DSI), Selected Mapping (SLM), and the DSI-SLM. In th...

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Bibliographic Details
Main Authors: Mohammady, Somayeh, Sulaiman, Nasri, Mohd Sidek, Roslina, Hamidon, Mohd Nizar, Varahram, Pooria
Format: Conference or Workshop Item
Language:English
Published: IEEE 2013
Online Access:http://psasir.upm.edu.my/id/eprint/68290/1/FPGA%20implementation%20of%20low%20complexity%20crest%20factor%20reduction%20in%20OFDM%20systems.pdf
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Summary:Orthogonal Frequency Division Multiplexing (OFDM) systems have a main drawback known as high Peak to Average Power Ratio (PAPR) or Crest Factor (CF). The main PAPR reduction techniques are Partial Transmit Sequence (PTS), Dummy Sequence Insertion (DSI), Selected Mapping (SLM), and the DSI-SLM. In this paper an innovative method known as Optimum Phase Sequence (OPS) with Dummy Sequence Insertion (DSI) is implemented on FPGA. The aim of this OPS-DSI scheme is to enhance the PAPR performance, increase the flexibility of the design and reduce the transmission complexity. In this paper, FPGA implementation of the OPS-DSI scheme is carried out and the results are compared with the simulation results. The transmission system is designed based on the IEEE 802.16e standard with 256 Inverse Fast Fourier Transform (IFFT) length and QPSK modulation.

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