A simulation study of thickness effect in performance of double lateral gate junctionless transistors
The electrical behaviour of double lateral gate junctionless transistors, regarding to the variation of channel thickness is investigated, through 3-D numerical simulations. The simulation results explicitly show that how the device thickness affect the on and off current and threshold voltage behav...
| Main Authors: | , , , , , |
|---|---|
| Format: | Conference or Workshop Item |
| Language: | English |
| Published: |
IEEE
2013
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| Online Access: | http://psasir.upm.edu.my/id/eprint/69169/1/A%20simulation%20study%20of%20thickness%20effect%20in%20performance%20of%20double%20lateral%20gate%20junctionless%20transistors.pdf |