Signal-to-noise ratio study on pipelined fast fourier transform processor
Fast Fourier transform (FFT) processor is a prevailing tool in converting signal in time domain to frequency domain. This paper provides signal-to-noise ratio (SNR) study on 16-point pipelined FFT processor implemented on field-programable gate array (FPGA). This processor can be used in vast digita...
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| Format: | Article |
| Language: | English |
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Institute of Advanced Engineering and Science
2018
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| Online Access: | http://psasir.upm.edu.my/id/eprint/73886/1/Signal-to-noise.pdf |
| _version_ | 1796979650498396160 |
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| author | Hassan, Siti Lailatul Sulaiman, Nasri Shariffudin, Shafinaz Sobihana Tuan Yaakub, Tuan Norjihan |
| author_facet | Hassan, Siti Lailatul Sulaiman, Nasri Shariffudin, Shafinaz Sobihana Tuan Yaakub, Tuan Norjihan |
| author_sort | Hassan, Siti Lailatul |
| collection | UPM |
| description | Fast Fourier transform (FFT) processor is a prevailing tool in converting signal in time domain to frequency domain. This paper provides signal-to-noise ratio (SNR) study on 16-point pipelined FFT processor implemented on field-programable gate array (FPGA). This processor can be used in vast digital signal applications such as wireless sensor network, digital video broadcasting and many more. These applications require accuracy in their data communication part, that is why SNR is an important analysis. SNR is a measure of signal strength relative to noise. The measurement is usually in decibles (dB). Previously, SNR studies have been carried out in software simulation, for example in Matlab. However, in this paper, pipelined FFT and SNR modules are developed in hardware form. SNR module is designed in Modelsim using Verilog code before implemented on FPGA board. The SNR module is connected directly to the output of the pipelined FFT module. Three different pipelined FFT with different architectures were studied. The result shows that SNR for radix-8 and R4SDC FFT architecture design are above 40dB, which represent a very excellent signal. SNR module on the FPGA and the SNR results of different pipelined FFT architecture can be consider as the novelty of this paper. |
| first_indexed | 2024-03-06T10:12:02Z |
| format | Article |
| id | upm.eprints-73886 |
| institution | Universiti Putra Malaysia |
| language | English |
| last_indexed | 2024-03-06T10:12:02Z |
| publishDate | 2018 |
| publisher | Institute of Advanced Engineering and Science |
| record_format | dspace |
| spelling | upm.eprints-738862022-05-17T08:36:06Z http://psasir.upm.edu.my/id/eprint/73886/ Signal-to-noise ratio study on pipelined fast fourier transform processor Hassan, Siti Lailatul Sulaiman, Nasri Shariffudin, Shafinaz Sobihana Tuan Yaakub, Tuan Norjihan Fast Fourier transform (FFT) processor is a prevailing tool in converting signal in time domain to frequency domain. This paper provides signal-to-noise ratio (SNR) study on 16-point pipelined FFT processor implemented on field-programable gate array (FPGA). This processor can be used in vast digital signal applications such as wireless sensor network, digital video broadcasting and many more. These applications require accuracy in their data communication part, that is why SNR is an important analysis. SNR is a measure of signal strength relative to noise. The measurement is usually in decibles (dB). Previously, SNR studies have been carried out in software simulation, for example in Matlab. However, in this paper, pipelined FFT and SNR modules are developed in hardware form. SNR module is designed in Modelsim using Verilog code before implemented on FPGA board. The SNR module is connected directly to the output of the pipelined FFT module. Three different pipelined FFT with different architectures were studied. The result shows that SNR for radix-8 and R4SDC FFT architecture design are above 40dB, which represent a very excellent signal. SNR module on the FPGA and the SNR results of different pipelined FFT architecture can be consider as the novelty of this paper. Institute of Advanced Engineering and Science 2018-06 Article PeerReviewed text en http://psasir.upm.edu.my/id/eprint/73886/1/Signal-to-noise.pdf Hassan, Siti Lailatul and Sulaiman, Nasri and Shariffudin, Shafinaz Sobihana and Tuan Yaakub, Tuan Norjihan (2018) Signal-to-noise ratio study on pipelined fast fourier transform processor. Bulletin of Electrical Engineering and Informatics, 7 (2). 230 - 235. ISSN 2089-3191; ESSN: 2302-9285 https://beei.org/index.php/EEI/article/view/1167/0 10.11591/eei.v7i2.1167 |
| spellingShingle | Hassan, Siti Lailatul Sulaiman, Nasri Shariffudin, Shafinaz Sobihana Tuan Yaakub, Tuan Norjihan Signal-to-noise ratio study on pipelined fast fourier transform processor |
| title | Signal-to-noise ratio study on pipelined fast fourier transform processor |
| title_full | Signal-to-noise ratio study on pipelined fast fourier transform processor |
| title_fullStr | Signal-to-noise ratio study on pipelined fast fourier transform processor |
| title_full_unstemmed | Signal-to-noise ratio study on pipelined fast fourier transform processor |
| title_short | Signal-to-noise ratio study on pipelined fast fourier transform processor |
| title_sort | signal to noise ratio study on pipelined fast fourier transform processor |
| url | http://psasir.upm.edu.my/id/eprint/73886/1/Signal-to-noise.pdf |
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