Speed Efficient Hardware Implementation Of Advanced Encryption Standard (Aes)
Cryptography plays a vital role in data security against the attacks from the third party. In this thesis, the focus is to leverage existing, commonly used cryptography algorithm which is the Advanced Encryption Standard (AES) and improve its speed performance. The motivation is to make encryption p...
Main Author: | Low, Chiau Thian |
---|---|
Format: | Thesis |
Language: | English |
Published: |
2017
|
Subjects: | |
Online Access: | http://eprints.usm.my/39591/1/LOW_CHIAU_THIAN_24_Pages.pdf |
Similar Items
-
Efficient Hardware Implementation Of Haar Wavelet Transform With Line-Based And Dual-Scan Image Memory Accesses
by: Ahmed Saad, Laila
Published: (2017) -
Development Of Efficient Multi-Level Discrete
Wavelet Transform Hardware Architecture For
Image Compression
by: Hasan Al-Jumail, Khamees Khalaf
Published: (2015) -
Hardware And Software Implementation Of Artificial Neural Network In Altera De1-Soc
by: Lim, Chun Ming
Published: (2017) -
Accelerating the AES encryption function in OpenSSL for embedded systems
by: Mohd. Hani, Mohamed Khalil, et al.
Published: (2009) -
EEE 523 - HARDWARE SOFTWARE CO-DESIGN MARCH 2005
by: PPKEE, Pusat Pengajian Kejuruteraan Elektrik & Elektronik
Published: (2005)