| Summary: | This thesis presents the design of a Transimpedance Amplifier (TIA) for the HDMI
interface operating at data rate of 5-Gb/s. The TIA design employs a fully balanced
and differential output configuration from a single 1.8-V power supply for better noise
rejection to achieve good input optical sensitivity. This design is implemented using
0.18-mm Complementary Metal-Oxide-Semiconductor (CMOS) technology as it provides
higher bandwidth due to technology scaling. The TIA uses the Regulated Cascode
(RGC) circuit as an input block for photodiode capacitance isolation and shunt
feedback stage for differential swing amplification. To meet the requirement for 4-
GHz bandwidth in the TIA design, an active inductor and capacitive de-generation
techniques have been implemented in the existing RGC and shunt feedback architecture,
respectively. These two implementations extend the bandwidth without using a
large amount of Direct-Current (DC) current to drive output capacitive load. The TIA
design also employs the Common-Mode Feedback (CMFB) and DC offset cancellation
circuit to form a fully balanced and differential output configuration, specifically
for the improvement of common mode noise rejection and better input sensitivity for
HDMI optical interface.
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