Stability Improvement For The Latency Insertion Method Based On The Verlet Concept For Signal And Power Integrity Simulations
This thesis presents a modified Latency Insertion Method (LIM) that can be applied for signal and power integrity simulations of networks such as transmission lines, 2-D plane circuit model and multi-layered on-chip circuit model. LIM, as one of the transient analysis technique, is proven to be fast...
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| Format: | Thesis |
| Language: | English |
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2017
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| Online Access: | http://eprints.usm.my/46477/1/Stability%20Improvement%20For%20The%20Latency%20Insertion%20Method%20Based%20On%20The%20Verlet%20Concept%20For%20Signal%20And%20Power%20Integrity%20Simulations.pdf |
| _version_ | 1825905569125367808 |
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| author | Tan, Kin Hang |
| author_facet | Tan, Kin Hang |
| author_sort | Tan, Kin Hang |
| collection | USM |
| description | This thesis presents a modified Latency Insertion Method (LIM) that can be applied for signal and power integrity simulations of networks such as transmission lines, 2-D plane circuit model and multi-layered on-chip circuit model. LIM, as one of the transient analysis technique, is proven to be fast and reliable for large networks simulation. However, due to the behaviour of the explicit formulation, which derived from the finite-difference time-domain (FDTD) technique, shared the same limitation of the time step size to maintain its numerical stability. This creates a problem, particularly in ill-constructed circuit where a small number of elements possess smaller parasitic inductances and capacitances which necessitate the need for extremely small time step size. In order to maintain the LIM stability, one must comply with the Courant-Friedrichs-Lewy (CFL) condition, limiting the time step size which basically depends on the smallest inductance and capacitance of the entire network. In this thesis, an innovative LIM with Verlet concept has been proposed with the intention to enhance LIM with unconditional stability without sacrificing much on its accuracy. The proposed method has been tested on three different circuit model and each model included an ill-constructed condition. All the simulations show that feasible results which is similar to that of the normal LIM can be obtained through the proposed method. This improved LIM method gives not only unconditional stability, but accuracy up to 90% on average with a time step size of 3 times larger than the maximum time step size of normal LIM. |
| first_indexed | 2024-03-06T15:36:25Z |
| format | Thesis |
| id | usm.eprints-46477 |
| institution | Universiti Sains Malaysia |
| language | English |
| last_indexed | 2024-03-06T15:36:25Z |
| publishDate | 2017 |
| record_format | dspace |
| spelling | usm.eprints-464772021-11-17T03:42:14Z http://eprints.usm.my/46477/ Stability Improvement For The Latency Insertion Method Based On The Verlet Concept For Signal And Power Integrity Simulations Tan, Kin Hang T Technology TK1-9971 Electrical engineering. Electronics. Nuclear engineering This thesis presents a modified Latency Insertion Method (LIM) that can be applied for signal and power integrity simulations of networks such as transmission lines, 2-D plane circuit model and multi-layered on-chip circuit model. LIM, as one of the transient analysis technique, is proven to be fast and reliable for large networks simulation. However, due to the behaviour of the explicit formulation, which derived from the finite-difference time-domain (FDTD) technique, shared the same limitation of the time step size to maintain its numerical stability. This creates a problem, particularly in ill-constructed circuit where a small number of elements possess smaller parasitic inductances and capacitances which necessitate the need for extremely small time step size. In order to maintain the LIM stability, one must comply with the Courant-Friedrichs-Lewy (CFL) condition, limiting the time step size which basically depends on the smallest inductance and capacitance of the entire network. In this thesis, an innovative LIM with Verlet concept has been proposed with the intention to enhance LIM with unconditional stability without sacrificing much on its accuracy. The proposed method has been tested on three different circuit model and each model included an ill-constructed condition. All the simulations show that feasible results which is similar to that of the normal LIM can be obtained through the proposed method. This improved LIM method gives not only unconditional stability, but accuracy up to 90% on average with a time step size of 3 times larger than the maximum time step size of normal LIM. 2017-11-01 Thesis NonPeerReviewed application/pdf en http://eprints.usm.my/46477/1/Stability%20Improvement%20For%20The%20Latency%20Insertion%20Method%20Based%20On%20The%20Verlet%20Concept%20For%20Signal%20And%20Power%20Integrity%20Simulations.pdf Tan, Kin Hang (2017) Stability Improvement For The Latency Insertion Method Based On The Verlet Concept For Signal And Power Integrity Simulations. Masters thesis, Universiti Sains Malaysia. |
| spellingShingle | T Technology TK1-9971 Electrical engineering. Electronics. Nuclear engineering Tan, Kin Hang Stability Improvement For The Latency Insertion Method Based On The Verlet Concept For Signal And Power Integrity Simulations |
| title | Stability Improvement For The Latency Insertion Method Based On The Verlet Concept For Signal And Power Integrity Simulations |
| title_full | Stability Improvement For The Latency Insertion Method Based On The Verlet Concept For Signal And Power Integrity Simulations |
| title_fullStr | Stability Improvement For The Latency Insertion Method Based On The Verlet Concept For Signal And Power Integrity Simulations |
| title_full_unstemmed | Stability Improvement For The Latency Insertion Method Based On The Verlet Concept For Signal And Power Integrity Simulations |
| title_short | Stability Improvement For The Latency Insertion Method Based On The Verlet Concept For Signal And Power Integrity Simulations |
| title_sort | stability improvement for the latency insertion method based on the verlet concept for signal and power integrity simulations |
| topic | T Technology TK1-9971 Electrical engineering. Electronics. Nuclear engineering |
| url | http://eprints.usm.my/46477/1/Stability%20Improvement%20For%20The%20Latency%20Insertion%20Method%20Based%20On%20The%20Verlet%20Concept%20For%20Signal%20And%20Power%20Integrity%20Simulations.pdf |
| work_keys_str_mv | AT tankinhang stabilityimprovementforthelatencyinsertionmethodbasedontheverletconceptforsignalandpowerintegritysimulations |