Voltage clamp simulations of cardiac excitation: FPGA implementation
This paper presents the simulation study of voltage clamp technique that enables to analyse current-voltage (I-V) characteristics of ion currents based on Luo-Rudy Phase-I (LR-I) model by using a Field Programmable Gate Array (FPGA). Here, the I-V relationship presents the characterization of each i...
| Main Authors: | , , , , |
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| Format: | Article |
| Language: | English |
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Asian Research Publishing Network (ARPN)
2016
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| Online Access: | http://eprints.uthm.edu.my/4294/1/AJ%202016%20%2833%29.pdf |
| _version_ | 1825709816955273216 |
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| author | Mahmud, Farhanahani Mahamad, Abd Kadir Jabbar, M. Hairol Othman, Norliza Adon, Nur Atiqah |
| author_facet | Mahmud, Farhanahani Mahamad, Abd Kadir Jabbar, M. Hairol Othman, Norliza Adon, Nur Atiqah |
| author_sort | Mahmud, Farhanahani |
| collection | UTHM |
| description | This paper presents the simulation study of voltage clamp technique that enables to analyse current-voltage (I-V) characteristics of ion currents based on Luo-Rudy Phase-I (LR-I) model by using a Field Programmable Gate Array (FPGA). Here, the I-V relationship presents the characterization of each ion channel by a relation between membrane voltage, Vm and resulting channel current. In addition, the voltage clamp technique also allows the detection of single channel currents in biological membranes and is known to be applicable in identifying variety of electrophysiological problems in the cellular level. As computational simulations devote a vast amount of time to run due to the increasing complexity of cardiac models, a real-time hardware implementation using FPGA could be the solution as it provides high configurability and performance, and able to executes in parallel mode operation for high-performance real-time systems. For shorter time development while retaining high confidence results, FPGA-based rapid prototyping through HDL Coder from MATLAB software has been used to construct the algorithm for the simulation system. Basically, the HDL Coder is capable to convert the designed MATLAB Simulink blocks into hardware description language (HDL) for the FPGA implementation. As a result, the MATLAB Simulink successfully simulates the voltage clamp of the LR-I excitation model and identifies the I-V characteristics of the ionic currents through Xilinx Virtex-6 XC6VLX240T development board. |
| first_indexed | 2024-03-05T21:48:10Z |
| format | Article |
| id | uthm.eprints-4294 |
| institution | Universiti Tun Hussein Onn Malaysia |
| language | English |
| last_indexed | 2024-03-05T21:48:10Z |
| publishDate | 2016 |
| publisher | Asian Research Publishing Network (ARPN) |
| record_format | dspace |
| spelling | uthm.eprints-42942021-12-02T02:29:14Z http://eprints.uthm.edu.my/4294/ Voltage clamp simulations of cardiac excitation: FPGA implementation Mahmud, Farhanahani Mahamad, Abd Kadir Jabbar, M. Hairol Othman, Norliza Adon, Nur Atiqah TK7800-8360 Electronics This paper presents the simulation study of voltage clamp technique that enables to analyse current-voltage (I-V) characteristics of ion currents based on Luo-Rudy Phase-I (LR-I) model by using a Field Programmable Gate Array (FPGA). Here, the I-V relationship presents the characterization of each ion channel by a relation between membrane voltage, Vm and resulting channel current. In addition, the voltage clamp technique also allows the detection of single channel currents in biological membranes and is known to be applicable in identifying variety of electrophysiological problems in the cellular level. As computational simulations devote a vast amount of time to run due to the increasing complexity of cardiac models, a real-time hardware implementation using FPGA could be the solution as it provides high configurability and performance, and able to executes in parallel mode operation for high-performance real-time systems. For shorter time development while retaining high confidence results, FPGA-based rapid prototyping through HDL Coder from MATLAB software has been used to construct the algorithm for the simulation system. Basically, the HDL Coder is capable to convert the designed MATLAB Simulink blocks into hardware description language (HDL) for the FPGA implementation. As a result, the MATLAB Simulink successfully simulates the voltage clamp of the LR-I excitation model and identifies the I-V characteristics of the ionic currents through Xilinx Virtex-6 XC6VLX240T development board. Asian Research Publishing Network (ARPN) 2016 Article PeerReviewed text en http://eprints.uthm.edu.my/4294/1/AJ%202016%20%2833%29.pdf Mahmud, Farhanahani and Mahamad, Abd Kadir and Jabbar, M. Hairol and Othman, Norliza and Adon, Nur Atiqah (2016) Voltage clamp simulations of cardiac excitation: FPGA implementation. ARPN Journal of Engineering and Applied Sciences, 11 (24). pp. 14056-14064. ISSN 1819-6608 |
| spellingShingle | TK7800-8360 Electronics Mahmud, Farhanahani Mahamad, Abd Kadir Jabbar, M. Hairol Othman, Norliza Adon, Nur Atiqah Voltage clamp simulations of cardiac excitation: FPGA implementation |
| title | Voltage clamp simulations of cardiac excitation: FPGA implementation |
| title_full | Voltage clamp simulations of cardiac excitation: FPGA implementation |
| title_fullStr | Voltage clamp simulations of cardiac excitation: FPGA implementation |
| title_full_unstemmed | Voltage clamp simulations of cardiac excitation: FPGA implementation |
| title_short | Voltage clamp simulations of cardiac excitation: FPGA implementation |
| title_sort | voltage clamp simulations of cardiac excitation fpga implementation |
| topic | TK7800-8360 Electronics |
| url | http://eprints.uthm.edu.my/4294/1/AJ%202016%20%2833%29.pdf |
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