A study of 4-level DC-DC boost inverter with passive, component reduction consideration
This study is to analyze design principles of boost inductor and capacitor used in the 4-level DC-DC boost converter to realize size reduction of passive component referring to their attributes. The important feature of this circuit is that most of the boost-up energy is transferred from the capacit...
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Format: | Article |
Language: | English |
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IOP Publishing
2018
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Online Access: | http://eprints.uthm.edu.my/5443/1/AJ%202018%20%28187%29.pdf |
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author | Kasiran, A. N. Ponniran, A. Harimon, M. A. Hamzah, H. H. |
author_facet | Kasiran, A. N. Ponniran, A. Harimon, M. A. Hamzah, H. H. |
author_sort | Kasiran, A. N. |
collection | UTHM |
description | This study is to analyze design principles of boost inductor and capacitor used in the 4-level DC-DC boost converter to realize size reduction of passive component referring to their attributes. The important feature of this circuit is that most of the boost-up energy is transferred from the capacitor-clamped to the output side which the small inductance can be used at the input side. The inductance of the boost inductor is designed by referring the inductor current ripple. On the other hand, the capacitance of the capacitor-clamped is designed by considering voltage stress on semiconductor devices and also the used switching frequency. Besides that, according to the design specifications, the required inductance in 4-level DC-DC boost converter is decreased compared to a conventional conventional DC-DC boost converter. Meanwhile, voltage stress on semiconductor device is depending on the maximum voltage ripple of the capacitor-clamped. A 50 W 4-level DC-DC boost converter prototype has been constructed. The results show that the inductor current ripple was 1.15 A when the inductors, 1 mH and 0.11 mH were used in the conventional and 4-level DC-DC boost converters, respectively. Thus, based on the experimental results, it shows that the reduction of passive components by referring to their attributes in 4-level DC-DC boost converter is achieved. Moreover, the decreasing of voltage stress on the semiconductor devices is an advantage for the selection of low ON-resistance of the devices which will contribute to the reduction of the semiconductor conduction loss. The integration result of boost converter and H-bridge inverter is also shown. |
first_indexed | 2024-03-05T21:51:18Z |
format | Article |
id | uthm.eprints-5443 |
institution | Universiti Tun Hussein Onn Malaysia |
language | English |
last_indexed | 2024-03-05T21:51:18Z |
publishDate | 2018 |
publisher | IOP Publishing |
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spelling | uthm.eprints-54432022-01-09T07:23:42Z http://eprints.uthm.edu.my/5443/ A study of 4-level DC-DC boost inverter with passive, component reduction consideration Kasiran, A. N. Ponniran, A. Harimon, M. A. Hamzah, H. H. T Technology (General) TK Electrical engineering. Electronics Nuclear engineering This study is to analyze design principles of boost inductor and capacitor used in the 4-level DC-DC boost converter to realize size reduction of passive component referring to their attributes. The important feature of this circuit is that most of the boost-up energy is transferred from the capacitor-clamped to the output side which the small inductance can be used at the input side. The inductance of the boost inductor is designed by referring the inductor current ripple. On the other hand, the capacitance of the capacitor-clamped is designed by considering voltage stress on semiconductor devices and also the used switching frequency. Besides that, according to the design specifications, the required inductance in 4-level DC-DC boost converter is decreased compared to a conventional conventional DC-DC boost converter. Meanwhile, voltage stress on semiconductor device is depending on the maximum voltage ripple of the capacitor-clamped. A 50 W 4-level DC-DC boost converter prototype has been constructed. The results show that the inductor current ripple was 1.15 A when the inductors, 1 mH and 0.11 mH were used in the conventional and 4-level DC-DC boost converters, respectively. Thus, based on the experimental results, it shows that the reduction of passive components by referring to their attributes in 4-level DC-DC boost converter is achieved. Moreover, the decreasing of voltage stress on the semiconductor devices is an advantage for the selection of low ON-resistance of the devices which will contribute to the reduction of the semiconductor conduction loss. The integration result of boost converter and H-bridge inverter is also shown. IOP Publishing 2018 Article PeerReviewed text en http://eprints.uthm.edu.my/5443/1/AJ%202018%20%28187%29.pdf Kasiran, A. N. and Ponniran, A. and Harimon, M. A. and Hamzah, H. H. (2018) A study of 4-level DC-DC boost inverter with passive, component reduction consideration. Journal of Physics: Conference Series, 995. pp. 1-9. ISSN 1742-6588 |
spellingShingle | T Technology (General) TK Electrical engineering. Electronics Nuclear engineering Kasiran, A. N. Ponniran, A. Harimon, M. A. Hamzah, H. H. A study of 4-level DC-DC boost inverter with passive, component reduction consideration |
title | A study of 4-level DC-DC boost inverter with passive, component reduction consideration |
title_full | A study of 4-level DC-DC boost inverter with passive, component reduction consideration |
title_fullStr | A study of 4-level DC-DC boost inverter with passive, component reduction consideration |
title_full_unstemmed | A study of 4-level DC-DC boost inverter with passive, component reduction consideration |
title_short | A study of 4-level DC-DC boost inverter with passive, component reduction consideration |
title_sort | study of 4 level dc dc boost inverter with passive component reduction consideration |
topic | T Technology (General) TK Electrical engineering. Electronics Nuclear engineering |
url | http://eprints.uthm.edu.my/5443/1/AJ%202018%20%28187%29.pdf |
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