FPGA prototyping of universal asynchronous receiver-transmitter (UART) using altera VHDL implementation
External devices such as modems and other computers need to communicate serially. In order to provide this communication, a universal asynchronous receiver-transmitter (UART) can provide an asynchronous serial data communication with I/O outputs devices such as keyboard, mouse or keypad. It can tran...
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| Format: | Thesis |
| Language: | English English English |
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2005
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| Online Access: | http://eprints.uthm.edu.my/6841/1/24p%20NABIHAH%20%40%20NORNABIHAH%20AHMAD.pdf http://eprints.uthm.edu.my/6841/2/NABIHAH%20%40%20NORNABIHAH%20AHMAD%20COPYRIGHT%20DECLARATION.pdf http://eprints.uthm.edu.my/6841/3/NABIHAH%20%40%20NORNABIHAH%20AHMAD%20WATERMARK.pdf |
| _version_ | 1825710264059691008 |
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| author | Ahmad, Nabihah @ Nornabihah |
| author_facet | Ahmad, Nabihah @ Nornabihah |
| author_sort | Ahmad, Nabihah @ Nornabihah |
| collection | UTHM |
| description | External devices such as modems and other computers need to communicate serially. In order to provide this communication, a universal asynchronous receiver-transmitter (UART) can provide an asynchronous serial data communication with I/O outputs devices such as keyboard, mouse or keypad. It can transmit serial data on over it’s transmit line (TxD) and receive serial data over it’s receive line (RxD). This project describes a universal asynchronous receiver-transmitter (UART) design. It is design from Very High Speed Integrated Circuit Hardware Description Language (VHDL) description, and then to Field Programmable Gate Array (FPGA) implementation. VHDL is used to provide a simple way of design entry through behavioral description. This project covers VHDL integration issue involved in the flow from high-level description to a fully simulated and synthesized. FPGA University Program Educational Board (UP2) is used to achieve fast prototype build and logic circuit verification. Then analysis the features of other existing UART technology design. |
| first_indexed | 2024-03-05T21:54:58Z |
| format | Thesis |
| id | uthm.eprints-6841 |
| institution | Universiti Tun Hussein Onn Malaysia |
| language | English English English |
| last_indexed | 2024-03-05T21:54:58Z |
| publishDate | 2005 |
| record_format | dspace |
| spelling | uthm.eprints-68412022-03-28T01:31:16Z http://eprints.uthm.edu.my/6841/ FPGA prototyping of universal asynchronous receiver-transmitter (UART) using altera VHDL implementation Ahmad, Nabihah @ Nornabihah TK7800-8360 Electronics External devices such as modems and other computers need to communicate serially. In order to provide this communication, a universal asynchronous receiver-transmitter (UART) can provide an asynchronous serial data communication with I/O outputs devices such as keyboard, mouse or keypad. It can transmit serial data on over it’s transmit line (TxD) and receive serial data over it’s receive line (RxD). This project describes a universal asynchronous receiver-transmitter (UART) design. It is design from Very High Speed Integrated Circuit Hardware Description Language (VHDL) description, and then to Field Programmable Gate Array (FPGA) implementation. VHDL is used to provide a simple way of design entry through behavioral description. This project covers VHDL integration issue involved in the flow from high-level description to a fully simulated and synthesized. FPGA University Program Educational Board (UP2) is used to achieve fast prototype build and logic circuit verification. Then analysis the features of other existing UART technology design. 2005-11 Thesis NonPeerReviewed text en http://eprints.uthm.edu.my/6841/1/24p%20NABIHAH%20%40%20NORNABIHAH%20AHMAD.pdf text en http://eprints.uthm.edu.my/6841/2/NABIHAH%20%40%20NORNABIHAH%20AHMAD%20COPYRIGHT%20DECLARATION.pdf text en http://eprints.uthm.edu.my/6841/3/NABIHAH%20%40%20NORNABIHAH%20AHMAD%20WATERMARK.pdf Ahmad, Nabihah @ Nornabihah (2005) FPGA prototyping of universal asynchronous receiver-transmitter (UART) using altera VHDL implementation. Masters thesis, Kolej Universiti Tun Hussein Onn Malaysia. |
| spellingShingle | TK7800-8360 Electronics Ahmad, Nabihah @ Nornabihah FPGA prototyping of universal asynchronous receiver-transmitter (UART) using altera VHDL implementation |
| title | FPGA prototyping of universal asynchronous receiver-transmitter (UART) using altera VHDL implementation |
| title_full | FPGA prototyping of universal asynchronous receiver-transmitter (UART) using altera VHDL implementation |
| title_fullStr | FPGA prototyping of universal asynchronous receiver-transmitter (UART) using altera VHDL implementation |
| title_full_unstemmed | FPGA prototyping of universal asynchronous receiver-transmitter (UART) using altera VHDL implementation |
| title_short | FPGA prototyping of universal asynchronous receiver-transmitter (UART) using altera VHDL implementation |
| title_sort | fpga prototyping of universal asynchronous receiver transmitter uart using altera vhdl implementation |
| topic | TK7800-8360 Electronics |
| url | http://eprints.uthm.edu.my/6841/1/24p%20NABIHAH%20%40%20NORNABIHAH%20AHMAD.pdf http://eprints.uthm.edu.my/6841/2/NABIHAH%20%40%20NORNABIHAH%20AHMAD%20COPYRIGHT%20DECLARATION.pdf http://eprints.uthm.edu.my/6841/3/NABIHAH%20%40%20NORNABIHAH%20AHMAD%20WATERMARK.pdf |
| work_keys_str_mv | AT ahmadnabihahnornabihah fpgaprototypingofuniversalasynchronousreceivertransmitteruartusingalteravhdlimplementation |