Optimal routing algorithm for minimizing interconnect delay in VLSI layout design
ROVISP 2007 will cover a broad spectrum of research areas that are of common interests, and will pay particular attention to the industrial needs. Papers describing original work in, but not limited to, the following areas will be considered for oral and poster presentations: Control, mechatronics &...
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2007
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author | Mohd. Hani, Mohamed Khalil |
author_facet | Mohd. Hani, Mohamed Khalil |
author_sort | Mohd. Hani, Mohamed Khalil |
collection | ePrints |
description | ROVISP 2007 will cover a broad spectrum of research areas that are of common interests, and will pay particular attention to the industrial needs. Papers describing original work in, but not limited to, the following areas will be considered for oral and poster presentations: Control, mechatronics & automation, Vision, image & signal processing, Artificial intelligence & computer applications, Electronic design & applications, Telecommunication systems & applications, etc. |
first_indexed | 2024-03-05T18:27:32Z |
format | Conference or Workshop Item |
id | utm.eprints-14260 |
institution | Universiti Teknologi Malaysia - ePrints |
last_indexed | 2024-03-05T18:27:32Z |
publishDate | 2007 |
record_format | dspace |
spelling | utm.eprints-142602017-06-22T00:36:13Z http://eprints.utm.my/14260/ Optimal routing algorithm for minimizing interconnect delay in VLSI layout design Mohd. Hani, Mohamed Khalil TK Electrical engineering. Electronics Nuclear engineering ROVISP 2007 will cover a broad spectrum of research areas that are of common interests, and will pay particular attention to the industrial needs. Papers describing original work in, but not limited to, the following areas will be considered for oral and poster presentations: Control, mechatronics & automation, Vision, image & signal processing, Artificial intelligence & computer applications, Electronic design & applications, Telecommunication systems & applications, etc. 2007 Conference or Workshop Item PeerReviewed Mohd. Hani, Mohamed Khalil (2007) Optimal routing algorithm for minimizing interconnect delay in VLSI layout design. In: Int. Conf. on Robotic, Vision, Information and Signal Processing (ROVISP 2007), 2007, Penang. http://www.ieee.org/conferences_events/conferences/conferencedetails/index.html?Conf_ID=12668 |
spellingShingle | TK Electrical engineering. Electronics Nuclear engineering Mohd. Hani, Mohamed Khalil Optimal routing algorithm for minimizing interconnect delay in VLSI layout design |
title | Optimal routing algorithm for minimizing interconnect delay in VLSI layout design |
title_full | Optimal routing algorithm for minimizing interconnect delay in VLSI layout design |
title_fullStr | Optimal routing algorithm for minimizing interconnect delay in VLSI layout design |
title_full_unstemmed | Optimal routing algorithm for minimizing interconnect delay in VLSI layout design |
title_short | Optimal routing algorithm for minimizing interconnect delay in VLSI layout design |
title_sort | optimal routing algorithm for minimizing interconnect delay in vlsi layout design |
topic | TK Electrical engineering. Electronics Nuclear engineering |
work_keys_str_mv | AT mohdhanimohamedkhalil optimalroutingalgorithmforminimizinginterconnectdelayinvlsilayoutdesign |