Design of a route lookup processor for implementation in a FPGA-based system-on chip (SoC)

Bibliographic Details
Main Author: Teh , J-Wing
Format: Thesis
Published: 2004
Subjects:
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author Teh , J-Wing
author_facet Teh , J-Wing
author_sort Teh , J-Wing
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spelling utm.eprints-423542014-11-02T02:37:47Z http://eprints.utm.my/42354/ Design of a route lookup processor for implementation in a FPGA-based system-on chip (SoC) Teh , J-Wing TK Electrical engineering. Electronics Nuclear engineering 2004 Thesis NonPeerReviewed Teh , J-Wing (2004) Design of a route lookup processor for implementation in a FPGA-based system-on chip (SoC). Masters thesis, Universiti Teknologi Malaysia, Faculty of Electrical Engineering.
spellingShingle TK Electrical engineering. Electronics Nuclear engineering
Teh , J-Wing
Design of a route lookup processor for implementation in a FPGA-based system-on chip (SoC)
title Design of a route lookup processor for implementation in a FPGA-based system-on chip (SoC)
title_full Design of a route lookup processor for implementation in a FPGA-based system-on chip (SoC)
title_fullStr Design of a route lookup processor for implementation in a FPGA-based system-on chip (SoC)
title_full_unstemmed Design of a route lookup processor for implementation in a FPGA-based system-on chip (SoC)
title_short Design of a route lookup processor for implementation in a FPGA-based system-on chip (SoC)
title_sort design of a route lookup processor for implementation in a fpga based system on chip soc
topic TK Electrical engineering. Electronics Nuclear engineering
work_keys_str_mv AT tehjwing designofaroutelookupprocessorforimplementationinafpgabasedsystemonchipsoc