Design and development of standalone DSP prototype for QT intercal processing and monitoring

This paper describes the development of stand alone DSP hardware for QT interval monitoring and assessment. The QT interval has been known to be an important indicator prior to Myocardial Infarction (MI) and it is important to observe and monitor any changes in the period of the QT interval. The sys...

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Main Authors: Goh, Chun Seng, Shaikh Salleh, Sheikh Hussain, Jamaludin, Mohd. Najeb, Ismail, Kamarulafizam, Hamedi, Mahyar, Md. Noor, Alias
Format: Article
Published: 2012
Subjects:
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author Goh, Chun Seng
Shaikh Salleh, Sheikh Hussain
Jamaludin, Mohd. Najeb
Ismail, Kamarulafizam
Hamedi, Mahyar
Md. Noor, Alias
author_facet Goh, Chun Seng
Shaikh Salleh, Sheikh Hussain
Jamaludin, Mohd. Najeb
Ismail, Kamarulafizam
Hamedi, Mahyar
Md. Noor, Alias
author_sort Goh, Chun Seng
collection ePrints
description This paper describes the development of stand alone DSP hardware for QT interval monitoring and assessment. The QT interval has been known to be an important indicator prior to Myocardial Infarction (MI) and it is important to observe and monitor any changes in the period of the QT interval. The system consists of three units. The first unit includes floating point digital signal processor, TMS320VC33 which is selected for the development of signal processing with memory circuit. The following unit includes the development of signal monitoring displays circuit with universal serial bus (USB) interface. The third unit includes the development of analog front end (AFE) circuit and merged with signal conditioning circuit. This paper discusses the principle of system design and the system has the advantages to maximize utilization by allowing modification, reconfiguration, portable, cost effective and run in stand-alone operation. As well as eligibility of on board pre-program algorithm for QT analysis which existing ECG monitoring equipment are lacking. The system had been successfully tested with algorithm for QT analysis and it is validated with healthy subject's data files from PTB diagnostic ECG data base.
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spelling utm.eprints-467812017-09-19T08:55:41Z http://eprints.utm.my/46781/ Design and development of standalone DSP prototype for QT intercal processing and monitoring Goh, Chun Seng Shaikh Salleh, Sheikh Hussain Jamaludin, Mohd. Najeb Ismail, Kamarulafizam Hamedi, Mahyar Md. Noor, Alias TA Engineering (General). Civil engineering (General) This paper describes the development of stand alone DSP hardware for QT interval monitoring and assessment. The QT interval has been known to be an important indicator prior to Myocardial Infarction (MI) and it is important to observe and monitor any changes in the period of the QT interval. The system consists of three units. The first unit includes floating point digital signal processor, TMS320VC33 which is selected for the development of signal processing with memory circuit. The following unit includes the development of signal monitoring displays circuit with universal serial bus (USB) interface. The third unit includes the development of analog front end (AFE) circuit and merged with signal conditioning circuit. This paper discusses the principle of system design and the system has the advantages to maximize utilization by allowing modification, reconfiguration, portable, cost effective and run in stand-alone operation. As well as eligibility of on board pre-program algorithm for QT analysis which existing ECG monitoring equipment are lacking. The system had been successfully tested with algorithm for QT analysis and it is validated with healthy subject's data files from PTB diagnostic ECG data base. 2012 Article PeerReviewed Goh, Chun Seng and Shaikh Salleh, Sheikh Hussain and Jamaludin, Mohd. Najeb and Ismail, Kamarulafizam and Hamedi, Mahyar and Md. Noor, Alias (2012) Design and development of standalone DSP prototype for QT intercal processing and monitoring. Scientific Research and Essays, 7 (18). pp. 1813-1829. ISSN 1992-2248 http://dx.doi.org/10.5897/SRE11.1815
spellingShingle TA Engineering (General). Civil engineering (General)
Goh, Chun Seng
Shaikh Salleh, Sheikh Hussain
Jamaludin, Mohd. Najeb
Ismail, Kamarulafizam
Hamedi, Mahyar
Md. Noor, Alias
Design and development of standalone DSP prototype for QT intercal processing and monitoring
title Design and development of standalone DSP prototype for QT intercal processing and monitoring
title_full Design and development of standalone DSP prototype for QT intercal processing and monitoring
title_fullStr Design and development of standalone DSP prototype for QT intercal processing and monitoring
title_full_unstemmed Design and development of standalone DSP prototype for QT intercal processing and monitoring
title_short Design and development of standalone DSP prototype for QT intercal processing and monitoring
title_sort design and development of standalone dsp prototype for qt intercal processing and monitoring
topic TA Engineering (General). Civil engineering (General)
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