Longevity framework: leveraging online integrated aging-aware hierarchical mapping and VF-selection for lifetime reliability optimization in manycore processors by Rathore, Vijeta, Chaturvedi, Vivek, Singh, Amit K., Srikanthan, Thambipillai, Shafique, Muhammad

“…Extensive experimentation, comparing the proposed approach with two state-of-the-art methods, for 64-core and 256-core systems running applications from PARSEC and SPLASH-2 benchmark suites, show an improvement of up to 3.2 years in the system lifetime reliability and 4×improvement in the average core health.…”
Get full text

Predictability and performance aware replacement policy PVISAM for unified shared caches in real-time multicores by Mohammad Shihabul Haque, Arvind Easwaran

“…Trace-driven experimental results for Parsec benchmark applications reveal that performance of a unified shared cache memory improves by 101.68 × on average (minimum 1.09× and maximum 1138.50 × ) when PVISAM is used instead of either the aforementioned write-update protocol-based predictable partitioning or the widely used write-invalidate consistency protocol-based partitioning. …”
Get full text

Thermal-aware task mapping on dynamically reconfigurable network-on-chip based multiprocessor system-on-chip by Liu, Weichen, Yang, Lei, Jiang, Weiwen, Feng, Liang, Guan, Nan, Zhang, Wei, Dutt, Nikil

“…Performance evaluation on PARSEC shows the applicability and effectiveness of the proposed techniques, which achieve on average 42.5 and 32.4 percent improvement in communication and application performance, and 32.3 percent reduction in system energy consumption, compared with state-of-the-art techniques. …”
Get full text
Get full text