Container Technologies for ARM Architecture: A Comprehensive Survey of the State-of-the-Art by Shahidullah Kaiser, Md. Sadun Haq, Ali Saman Tosun, Turgay Korkmaz

Subjects: “…ARM architecture…”
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Implementation of Manchester codec for information transmission systems based on AVR and ARM architecture microcontrollers by Sadchenko А. V., Kushnirenko O. A., Kushnirenko N. P., Sadchenko O. V., Troyanskiy O. V.

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Recent Advances in Nanoparticle Development for Drug Delivery: A Comprehensive Review of Polycaprolactone-Based Multi-Arm Architectures by Ridouan El Yousfi, Mohamed Brahmi, Mohammed Dalli, Nafea Achalhi, Omar Azougagh, Abdesselam Tahani, Rachid Touzani, Abderrahmane El Idrissi

“…This review focuses on examining the key variables that influence the customization of multi-arm architecture assemblies based on polycaprolactone and their impact on drug loading and delivery. …”
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System Time Issues for the ARM Cortex A8 Processor by Irina Fedotova, Eduard Siemens

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Secure HIGHT Implementation on ARM Processors by Hwajeong Seo, Hyunjun Kim, Kyungbae Jang, Hyeokdong Kwon, Minjoo Sim, Gyeongju Song, Siwoo Uhm, Hyunji Kim

“…In the 32-bit word architecture (i.e., the 32-bit ARM architecture), four 8-bit operations are executed at once with the four-way SIMD instruction. …”
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Estimation of similarity between functions extracted from x86 executable files by Berta Katarina, Stojanović Saša, Cvetanović Miloš, Radivojević Zaharije

“…The goal of this paper is to evaluate whether the existing solution meant for ARM architecture can be applied to x86 architecture. The existing solution encompasses multiple approaches, but for the purpose of this paper three representative approaches are implemented; two are based on machine learning, and the third does not require previous knowledge. …”
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Data Alignment on Embedded CPUs for Programmable Control Devices by Marcin Hubacz, Bartosz Trybus

“…Tests of these methods are performed on several CPUs with ARM architecture (with variants), MIPS, RISC-V, Quark, and others, often used as hardware platforms for control devices. …”
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Low-cost multi-UAVs system built on everyday objects by Dinh, Quang Hung

“…o This also implies subsequent programming on the Raspberry Pi’s ARM architecture and UNIX Operating System. o Moreover, multi-task (multi-threading) programming and code optimization become critical…”
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A Lightweight Network Deployed on ARM Devices for Hand Gesture Recognition by Mingyue Zhang, Zhiheng Zhou, Tianlei Wang, Wenlve Zhou

“…With the improvement of model feature extraction ability and the increase in the number of model parameters, it is becoming more challenging to achieve a small memory footprint on mobile devices based on an ARM architecture or CPU devices based on x86 architecture. …”
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Fuzzability Testing Framework for Incomplete Firmware Binary by Jiwon Jang, Gyeongjin Son, Hyeonsu Lee, Heesun Yun, Deokjin Kim, Sangwook Lee, Seongmin Kim, Daehee Jang

“…We evaluate FT-Framework using PX4 and ArduPilot firmwares which is based on 32-bit ARM architecture and demonstrate the efficacy of this approach and limitations.…”
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Parallel Implementations of ARIA on ARM Processors and Graphics Processing Unit by Siwoo Eum, Hyunjun Kim, Hyeokdong Kwon, Minjoo Sim, Gyeongju Song, Hwajeong Seo

“…The ARMv8 processor is the latest 64-bit ARM architecture and supports ASIMD for parallel implementations. …”
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Hyperledger Fabric Access Control System for Internet of Things Layer in Blockchain-Based Applications by Adnan Iftekhar, Xiaohui Cui, Qi Tao, Chengliang Zheng

“…Single board computers based on the ARM architecture are becoming increasingly powerful and popular in automation applications. …”
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DC power supply system based on parallel battery modules and its HMI display by Jiao, Yuting

“…The software platform applies an embedded Linux operating system based on the ARM architecture with high real-time performance. The human-machine interaction function of the designed integrated power supply monitoring device performs information visualisation and it can display various system operation status and alarm information, as well as parameter settings and manual control. …”
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Reference Architecture for Running Computationally Intensive Physics-Based Digital Twins of Heavy Equipment in a Heterogeneous Execution Environment by Victor Zhidchenko, Egor Startcev, Heikki Handroos

“…Experiments were performed using the Amazon cloud platform, an edge computing system represented by a single-board microcomputer based on ARM architecture, and a virtual machine on a desktop personal computer. …”
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LLVM RISC-V RV32X Graphics Extension Support and Characteristics Analysis of Graphics Programs by Peng Wang, Zhi-Bin Yu

“…The microarchitecture independent characteristics of the graphics rendering programs on the RISC-V architecture, X86 architecture, and ARM architecture are compared and analyzed at both the instruction level and memory level. …”
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Evaluation of next-generation high-order compressible fluid dynamic solver on cloud computing for complex industrial flows by R. Al Jahdali, S. Kortas, M. Shaikh, L. Dalcin, M. Parsani

“…In terms of time-to-solution, the Amazon Elastic Compute Cloud delivers the best performance, with the Graviton2 processors based on the Arm architecture being the fastest. However, the results also indicate that the Ibex nodes based on the AMD Rome architecture deliver good performance, close to those observed for the Amazon Elastic Compute Cloud. …”
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Hard-coded backdoor detection method based on semantic conflict by Anxiang HU, Da XIAO, Shichen GUO, Shengli LIU

“…The current router security issues focus on the mining and utilization of memory-type vulnerabilities, but there is low interest in detecting backdoors.Hard-coded backdoor is one of the most common backdoors, which is simple and convenient to set up and can be implemented with only a small amount of code.However, it is difficult to be discovered and often causes serious safety hazard and economic loss.The triggering process of hard-coded backdoor is inseparable from string comparison functions.Therefore, the detection of hard-coded backdoors relies on string comparison functions, which are mainly divided into static analysis method and symbolic execution method.The former has a high degree of automation, but has a high false positive rate and poor detection results.The latter has a high accuracy rate, but cannot automate large-scale detection of firmware, and faces the problem of path explosion or even unable to constrain solution.Aiming at the above problems, a hard-coded backdoor detection algorithm based on string text semantic conflict (Stect) was proposed since static analysis and the think of stain analysis.Stect started from the commonly used string comparison functions, combined with the characteristics of MIPS and ARM architectures, and extracted a set of paths with the same start and end nodes using function call relationships, control flow graphs, and branching selection dependent strings.If the strings in the successfully verified set of paths have semantic conflict, it means that there is a hard-coded backdoor in the router firmware.In order to evaluate the detection effect of Stect, 1 074 collected device images were tested and compared with other backdoor detection methods.Experimental results show that Stect has a better detection effect compared with existing backdoor detection methods including Costin and Stringer: 8 hard-coded backdoor images detected from image data set, and the recall rate reached 88.89%.…”
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Design of a lan interfacing module for a softcore processor AMIR CPU by Lim, Hui Teng

“…An AMIR CPU is a novel 32-bit softcore processor developed from the improvement of the weakness of existing Intel x86 and ARM architectures which has its own local I/O memory and easier ISA (Instruction Set Architecture) compared to RISC (Reduced Instruction Set Computer) and CISC (Complex Instruction Set Computer). …”
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hARMS: A Hardware Acceleration Architecture for Real-Time Event-Based Optical Flow by Daniel C. Stumpp, Himanshu Akolkar, Alan D. George, Ryad B. Benosman

“…Further, we present hARMS, a hardware realization of the fARMS algorithm allowing for real-time computation of true flow on low-power, embedded platforms. The proposed hARMS architecture targets hybrid system-on-chip devices and was designed to maximize configurability and throughput. …”
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