Atomic Layer-Deposited HfAlOx-Based RRAM with Low Operating Voltage for Computing In-Memory Applications by Zhen-Yu He, Tian-Yu Wang, Lin Chen, Hao Zhu, Qing-Qing Sun, Shi-Jin Ding, David Wei Zhang

Subjects: “…Computing in-memory…”
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A Fully-Integrated Memristor Chip for Edge Learning by Yanhong Zhang, Liang Chu, Wenjun Li

Subjects: “…Computing in memory…”
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An Efficient and Robust Partial Differential Equation Solver by Flash-Based Computing in Memory by Yueran Qi, Yang Feng, Jixuan Wu, Zhaohui Sun, Maoying Bai, Chengcheng Wang, Hai Wang, Xuepeng Zhan, Junyu Zhang, Jing Liu, Jiezhi Chen

Subjects: “…computing in memory…”
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A digital bit-reconfigurable versatile compute-in-memory macro for machine learning acceleration by Zhang, Xin, Lu, Yuncheng, Wang, Bo, Kim, Tony Tae-Hyoung

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SRAM based computing-in-memory for tiny machine learning by Gupta, Shini

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SRAM-Based CIM Architecture Design for Event Detection by Muhammad Bintang Gemintang Sulaiman, Jin-Yu Lin, Jian-Bai Li, Cheng-Ming Shih, Kai-Cheung Juang, Chih-Cheng Lu

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FeFET-Based Computing-in-Memory Unit Circuit and Its Application by Xiaojing Zha, Hao Ye

Subjects: “…computing-in-memory…”
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An Ultra-Low-Power Analog Multiplier–Divider Compatible with Digital Code for RRAM-Based Computing-in-Memory Macros by Yiming Yang, Shidong Lv, Xiaoran Li, Xinghua Wang, Qian Wang, Yiyang Yuan, Sen Liang, Feng Zhang

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Improving model robustness to weight noise via consistency regularization by Yaoqi Hou, Qingtian Zhang, Namin Wang, Huaqiang Wu

Subjects: “…computing in memory…”
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Capacitance and Conductance Compensation Methods for Efficient Computing‐In‐Memory Designs by Yubiao Luo, Fei Qiao, Zhong Sun

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Twofold Sparsity: Joint Bit- and Network-Level Sparsity for Energy-Efficient Deep Neural Network Using RRAM Based Compute-In-Memory by Foroozan Karimzadeh, Arijit Raychowdhury

Subjects: “…Computing-in-memory…”
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Reducing Influence of Noise in Regression Problems on Memristor Computing-in-Memory Chips by Hao Tang, Lu Liu, Zhouzheng Li, Zhiping Jia, Qingtian Zhang

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A 1.1-nJ/Classification True Analog Current Computing on Multilayer Neural Network With Crystalline-IGZO/Si-CMOS Monolithic Stack Technology by Kazuki Tsuda, Kazuma Furutani, Yuto Yakubo, Hiromichi Godo, Yoshinori Ando, Atsutake Kosuge, Toru Nakura, Shunpei Yamazaki

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Simulation of a Fully Digital Computing-in-Memory for Non-Volatile Memory for Artificial Intelligence Edge Applications by Hongyang Hu, Chuancai Feng, Haiyang Zhou, Danian Dong, Xiaoshan Pan, Xiwei Wang, Lu Zhang, Shuaiqi Cheng, Wan Pang, Jing Liu

Subjects: “…computing-in-memory (CIM)…”
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Multiplication-Free Lookup-Based CNN Accelerator Using Residual Vector Quantization and Its FPGA Implementation by Hiroshi Fuketa, Toshihiro Katashita, Yohei Hori, Masakazu Hioki

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Computing In-Memory Design Based on Double Word Line and Double Threshold 4T SRAM by LIN Zhiting, NIU Jianchao+, WU Xiulong, PENG Chunyu

Subjects: “…computing in-memory (cim)…”
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Flash-Based Computing-in-Memory Architecture to Implement High-Precision Sparse Coding by Yueran Qi, Yang Feng, Hai Wang, Chengcheng Wang, Maoying Bai, Jing Liu, Xuepeng Zhan, Jixuan Wu, Qianwen Wang, Jiezhi Chen

Subjects: “…computing in memory…”
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Hardware Implementation of Next Generation Reservoir Computing with RRAM‐Based Hybrid Digital‐Analog System by Danian Dong, Woyu Zhang, Yuanlu Xie, Jinshan Yue, Kuan Ren, Hongjian Huang, Xu Zheng, Wen Xuan Sun, Jin Ru Lai, Shaoyang Fan, Hongzhou Wang, Zhaoan Yu, Zhihong Yao, Xiaoxin Xu, Dashan Shang, Ming Liu

Subjects: “…computing‐in‐memory…”
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A Dual-Wordline 6T SRAM Computing-In-Memory Macro Featuring Full Signed Multi-Bit Computation for Lightweight Networks by Zupei Gu, Shukao Dou, Heng You, Yi Zhan, Shushan Qiao, Yumei Zhou

Subjects: “…Computing-in-memory…”
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Design of low-power gesture recognition system and self-organizing map processors by Lu, Yuncheng

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