Showing 1 - 20 results of 98 for search '"Anant Agarwal"', query time: 0.23s Refine Results
  1. 1
    Should planning of cervical pedicle screws be race specific? Computed tomography–based morphometric analysis

    Should planning of cervical pedicle screws be race specific? Computed tomography–based morphometric analysis by Ashish Agarwal, Anant Agarwal, Ashutosh Kumar

    Published 2023-01-01
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    Article
  2. 2
    Widening Access to Applied Machine Learning with TinyML

    Widening Access to Applied Machine Learning with TinyML by Vijay Janapa Reddi, Brian Plancher, Susan Kennedy, Laurence Moroney, Pete Warden, Lara Suzuki, Anant Agarwal, Colby Banbury, Massimo Banzi, Matthew Bennett, Benjamin Brown, Sharad Chitlangia, Radhika Ghosal, Sarah Grafman, Rupert Jaeger, Srivatsan Krishnan, Maximilian Lam, Daniel Leiker, Cara Mann, Mark Mazumder, Dominic Pajak, Dhilan Ramaprasad, J. Evan Smith, Matthew Stewart, Dustin Tingley

    Published 2022-01-01
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    Article
  3. 3
    Multigrain shared memory

    Multigrain shared memory by Yeung, Donald, 1968-

    Published 2007
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    Thesis
  4. 4
    The Alewife secondary storage subsystem

    The Alewife secondary storage subsystem by Chan, Wilson John

    Published 2006
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    Thesis
  5. 5
    Reactive synchronization algorithms for multiprocessors

    Reactive synchronization algorithms for multiprocessors by Lim, Beng-Hong

    Published 2007
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    Thesis
  6. 6
    Design and implementaiton of the Alewife startup module

    Design and implementaiton of the Alewife startup module by Chan, William K. (William Ka-Ming)

    Published 2007
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    Thesis
  7. 7
    Run-time thread management for large-scale distributed-memory multiprocessors

    Run-time thread management for large-scale distributed-memory multiprocessors by Nussbaum, Daniel Seth

    Published 2007
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    Thesis
  8. 8
    Control and reliability of optical networks in multiprocessors

    Control and reliability of optical networks in multiprocessors by Olsen, James Jonathan

    Published 2007
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    Thesis
  9. 9
    Integrated shared-memory and message-passing communication in the Alewife multiprocessor

    Integrated shared-memory and message-passing communication in the Alewife multiprocessor by Kubiatowicz, John, 1964-

    Published 2007
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    Thesis
  10. 10
    QuickStep, a system for performance monitoring and debugging parallel applications on the Alewife multiprocessor

    QuickStep, a system for performance monitoring and debugging parallel applications on the Alewife multiprocessor by Mitra, Sramana

    Published 2007
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    Thesis
  11. 11
    An evaluation of Fugu's network deadlock avoidance solution

    An evaluation of Fugu's network deadlock avoidance solution by Lee, Victor Wui-Keung

    Published 2007
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    Thesis
  12. 12
    Design and optimization of Fugu's user communication unit

    Design and optimization of Fugu's user communication unit by Michelson, Jonathan E. (Jonathan Erik)

    Published 2007
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    Thesis
  13. 13
    Applications performance on reconfigurable computers

    Applications performance on reconfigurable computers by Kim, Jang Don

    Published 2008
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    Thesis
  14. 14
    A scalable parallel inter-cluster communication system for clustered multiprocessors

    A scalable parallel inter-cluster communication system for clustered multiprocessors by Jiang, Xiaohu, 1968-

    Published 2008
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    Thesis
  15. 15
    Software based instruction caching for the RAW architecture

    Software based instruction caching for the RAW architecture by Miller, Jason Eric, 1976-

    Published 2013
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    Thesis
  16. 16
    Stream algorithms and architecture

    Stream algorithms and architecture by Hoffmann, Henry, 1977-

    Published 2014
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    Thesis
  17. 17
    parallel communication mechanisms for sparse, irregular applications

    parallel communication mechanisms for sparse, irregular applications by Chong, Frederic T. (Frederic Tsyh-An)

    Published 2005
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    Thesis
  18. 18
    An implementation of the virtual wires interconnect scheme

    An implementation of the virtual wires interconnect scheme by Dahl, Matthew Lyle

    Published 2005
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    Thesis
  19. 19
    InnerView hardware debugger : a logic analysis tool for the Virtual Wires emulation system

    InnerView hardware debugger : a logic analysis tool for the Virtual Wires emulation system by Hanono, Silvina Zimi

    Published 2005
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    Thesis
  20. 20
    The design of an efficient hardware subroutine protocol for FPGAs

    The design of an efficient hardware subroutine protocol for FPGAs by Bauer, Trevor Joseph

    Published 2005
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    Thesis

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