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    A Low-Overhead Reconfigurable RISC-V Quad-Core Processor Architecture for Fault-Tolerant Applications by Satyam Shukla, Kailash Chandra Ray

    Published 2022-01-01
    “…Compared to the state-of-the-art fault-tolerant computing system, the proposed design achieves -2.26% low area overhead with its reliability intact as DMR. …”
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