A Parallel FPGA Implementation of the CCSDS-123 Compression Algorithm per Milica Orlandić, Johan Fjeldtvedt, Tor Arne Johansen

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Design and Implementation of a 256-Bit RISC-V-Based Dynamically Scheduled Very Long Instruction Word on FPGA per Nguyen My Qui, Chang Hong Lin, Poki Chen

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A Fast and Efficient 191-bit Elliptic Curve Cryptographic Processor Using a Hybrid Karatsuba Multiplier for IoT Applications per Sumit Singh Dhanda, Brahmjit Singh, Chia-Chen Lin, Poonam Jindal, Deepak Panwar, Tarun Kumar Sharma, Saurabh Agarwal, Wooguil Pak

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An 8.8 ps RMS Resolution Time-To-Digital Converter Implemented in a 60 nm FPGA with Real-Time Temperature Correction per Zhipeng Song, Zhixiang Zhao, Hongsen Yu, Jingwu Yang, Xi Zhang, Tengjie Sui, Jianfeng Xu, Siwei Xie, Qiu Huang, Qiyu Peng

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Design, Analysis, and Application of Flipped Product Chaotic System per Md Sakib Hasan, Partha Sarathi Paul, Anurag Dhungel, Maisha Sadia, Md Razuan Hossain

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Design and Analysis of Digital Communication Within an SoC-Based Control System for Trapped-Ion Quantum Computing per Nafis Irtija, Jim Plusquellic, Eirini Eleni Tsiropoulou, Joshua Goldberg, Daniel Lobser, Daniel Stick

Matèries: “…system-on-chip (SoC)-based field-programmable gate arrays (FPGA) control system…”
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High Performance 128-Channel Acquisition System for Electrophysiological Signals per Kasun Sameera Mannatunga, Sawal Hamid Md Ali, Maria Liz Crespo, Andres Cicuttin, Jayathu G. Samarawikrama

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Image Processing Using FPGAs per Donald G. Bailey

Matèries: “…field programmable gate arrays (FPGA)…”
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Design and implementation of BeiDou signal fast acquisition algorithm based on FPGA+DSP per Chang GAO, Zewang CHEN, Qingxi ZENG, Chade LYU

Matèries: “…testing and measuring instruments; beidou; fast acquisition; coherent down-sampling; field-programmable gate arrays(fpga); digital signal processor(dsp)…”
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Real-Time Implementation of Hybrid Visible Light/Infrared Communications Supporting Full-Range Dynamic Dimming Control per Shixin Liu, Xiaodi You, Jian Chen, Changyuan Yu, Chaoran Xiong, Mingyi Gao, Gangxiang Shen

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A High Resolution Vernier Digital-to-Time Converter Implemented with 65 nm FPGA per Chenggang Yan, Chen Hu, Jianhui Wu

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Hardware-Based Run-Time Code Integrity in Embedded Devices per Taimour Wehbe, Vincent Mooney, David Keezer

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FPGA Implementation of IEC-61131-3-Based Hardware Aided Counters for PLC per Miroslaw Chmiel, Robert Czerwinski, Andrzej Malcher

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A Low Complexity Slm Scheme for Papr Reduction of OFDM Signals per Omar Mohammed Salih

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Digital-to-Time Converter with 3.93 ps Resolution Implemented on FPGA Chips per Min Zhang, Hai Wang, Yan Liu

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TinyCowNet: Memory- and Power-Minimized RNNs Implementable on Tiny Edge Devices for Lifelong Cow Behavior Distribution Estimation per Jim Bartels, Korkut Kaan Tokgoz, Sihan A, Masamoto Fukawa, Shohei Otsubo, Chao Li, Ikumi Rachi, Ken-Ichi Takeda, Ludovico Minati, Hiroyuki Ito

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Lightweight AES Design for IoT Applications: Optimizations in FPGA and ASIC With DFA Countermeasure Strategies per Salman Ahmed, Nabihah Ahmad, Nasir Ali Shah, Ghulam E. Mustafa Abro, Ardhi Wijayanto, Abdinasir Hirsi, Abdul Rehman Altaf

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Adaptive Real-Time Hybrid Neural Network-Based Device-Level Modeling for DC Traction HIL Application per Tian Liang, Zhen Huang, Venkata Dinavahi

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