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341
Finite Automata Capturing Winning Sequences for All Possible Variants of the PQ Penny Flip Game
Published 2018-02-01“…Automata are simple yet efficient finite state machines that can be utilized in a plethora of situations. …”
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342
Transparent, Low Resource, and Context-Aware Information Retrieval From a Closed Domain Knowledge Base
Published 2024-01-01“…This paper presents a non-goal oriented conversational agent based on a collection of finite state machines and an information search model for text search from an extensive collection of stored corporate documents and intranet websites. …”
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343
Doppelganger Obfuscation — Exploring theDefensive and Offensive Aspects of Hardware Camouflaging
Published 2020-12-01“…Doppelganger obstructs central control modules of digital designs, e.g., Finite State Machines (FSMs) or bus controllers, resulting in two different design functionalities: an apparent one that is recovered during reverse engineering and the actual one that is executed during operation. …”
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344
Multi-Phase Joint-Angle Trajectory Generation Inspired by Dog Motion for Control of Quadruped Robot
Published 2021-09-01“…Although various trajectory generation methods (e.x., central pattern generator, finite states machine) have been developed for this purpose, these methods have limited degrees of freedom with respect to the gait transition. …”
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345
The VAT tool : automatic transformation of VHDL to timed automata
Published 2005Get full text
Thesis -
346
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347
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348
A Deeply Pipelined CABAC Decoder for HEVC Supporting Level 6.2 High-tier Applications
Published 2015“…Additional techniques such as the state prefetch logic, latched-based context memory, and separate finite state machines are applied to minimize stall cycles, while multibypass- bin decoding is used to further increase the throughput. …”
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349
Improving Characteristics of LUT-Based Three-Block Mealy FSMs’ Circuits
Published 2022-03-01“…In this paper, we discuss the implementation of Mealy finite state machines (FSMs) by circuits consisting of look-up tables (LUT). …”
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350
CLB-Based Development of BiSS-C Interface Master for Motor Encoders
Published 2023-02-01“…By analyzing the detailed operation protocol of the BiSS-C interface, we create the truth and state tables for logic circuits and finite state machines, which are required for the BiSS-C interface master. …”
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351
Improving Characteristics of LUT-Based Sequential Blocks for Cyber-Physical Systems
Published 2022-04-01“…In this article, we discuss a case when Mealy finite state machines (FSMs) represent behaviour of sequential devices. …”
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352
Modeling and Individualizing Continuous Joint Kinematics Using Gaussian Process Enhanced Fourier Series
Published 2023-01-01“…Prosthetic discrete controller relies on finite state machines to switch between a set of predefined task-specific controllers. …”
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353
Moth: a hybrid threat model for improving software security testing
Published 2018“…This involved the combination of 3 threat modeling techniques namely misuse cases, attack trees and finite state machines in order to harness their individual strengths to design a Hybrid Threat Modeling framework and tool called MOTH (Modeling Threats using Hybrid techniques). …”
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Thesis -
354
Reducing Hardware in LUT-Based Mealy FSMs with Encoded Collections of Outputs
Published 2022-10-01“…A method is proposed that is focused on reducing the chip area occupied by logic elements creating the circuit of Mealy finite state machines (FSMs). The proposed method is aimed at FSM circuits implemented with internal resources of field-programmable gate arrays (FPGA). …”
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355
Non-intrusive smart power meter
Published 2017“…The NILM then, drive toward electrical load disaggregation through steady-state analysis, with the use of finite state machines incorporate with Viterbi Algorithm. …”
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Final Year Project (FYP) -
356
Improving Characteristics of FPGA-Based FSMs Representing Sequential Blocks of Cyber-Physical Systems
Published 2023-09-01“…This work proposes a method for hardware reduction in circuits of Mealy finite state machines (FSMs). The circuits are implemented as networks of interconnected look-up table (LUT) elements. …”
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357
Hardware Reduction for FSMs With Extended State Codes
Published 2024-01-01“…A method is proposed for reducing chip area occupied by logic circuits of FPGA-based Mealy finite state machines (FSMs). The proposed method aims at optimization of FSM circuits implemented with look-up table (LUT) elements of FPGA chip. …”
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358
An information theoretic score for learning hierarchical concepts
Published 2023-05-01“…CORE is applicable to generative models such as probabilistic finite state machines (beyond strings). We highlight a few properties of CORE with examples. …”
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359
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Reconfigurable Architectures for General-Purpose Computing
Published 2004“…For typical logic applications and finite- state machines, a DPGA can implement tasks in one-third the area of a traditional FPGA. …”
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