Showing 561 - 580 results of 1,895 for search '"MOSFET"', query time: 0.09s Refine Results
  1. 561

    Sub-10-nm-Diameter InGaAs Vertical Nanowire MOSFETs: Ni Versus Mo Contacts by Zhao, Xin, Heidelberger, Christopher, Fitzgerald, Eugene A, Lu, Wenjie, Vardi, Alon, del Alamo, Jesus A

    Published 2020
    “…Recently, sub-10-nm-diameter InGaAs vertical nanowire (VNW) MOSFETs have been demonstrated. The key to this achievement was the use of Ni for the top ohmic contact. …”
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    Article
  2. 562
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    High electron mobility germanium MOSFETs: Effect of n-type channel implants and ozone surface passivation by Hennessy, J., Antoniadis, Dimitri A.

    Published 2010
    “…In this study we demonstrate two methods for improving the performance of Ge nFETs, ozone surface passivation and ntype ion-implantation. Surface-channel nMOSFETs receiving a combination of O[subscript 3] passivation and 1*10[superscript 12] dose As or Sb implants show mobility comparable to the highest reported to date with improved subthreshold slope. …”
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    Article
  5. 565
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  7. 567

    The role of the disordered HfO2 network in the high- κ n-MOSFET shallow electron trapping by Gu, Chenjie, Zhou, Canliang, Ang, Diing Shenp, Ju, Xin, Gu, Renyuan, Duan, Tianli

    Published 2019
    “…Prevenient studies of the positive bias temperature instability degradation in the high-κ n-MOSFET indicate that oxygen vacancy (VO) is the dominant defect type that responds for the shallow electron trapping. …”
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    Journal Article
  8. 568
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    Ultra-low power high efficient rectifiers with 3T/4T double-gate MOSFETs for RFID applications by Kim, Tony Tae-Hyoung, Vaddi, Ramesh.

    Published 2012
    “…Recently, multi-gate MOSFETs such as double-gate MOSFETs have been identified as inevitable inclusion for future nano-scale circuit design. …”
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    Conference Paper
  10. 570

    Safe operating condition and lifetime estimation in p-MOSFET device due to negative bias temperature instability by Hussin, H., Soin, N.

    Published 2011
    “…Negative Bias Temperature Instability is a serious reliability concerns for modern p-MOSFETs with Effective Oxide Thickness less than 2nm. …”
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    Conference or Workshop Item
  11. 571

    Electrical performance of 0.5 µm MOSFET on bond-and-etch-back silicon-on-insulator(BESOI) substrate by Abdullah, Wan Fazlida Hanim, Mohd Sidek, Roslina, Mohd Saari, Shahrul Aman, Ahmad, Mohd Rais

    Published 2002
    “…0.5 µm gate length MOSFET is fabricated on Bond-and-Etch-Back Silicon-On-Insulator (BESOI) substrate using bulk CMOS technology. …”
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    Conference or Workshop Item
  12. 572

    Using curve-fitting optimisation technique to estimate power MOSFET model parameters for PECT II system by Aris, Ishak, Hulley, Lance Norman, Mariun, Norman, Sahbudin, Ratna Kalos Zakiah

    Published 1998
    “…This paper presents a proposed new structure of the power MOSFET model and its implementation in the HSPICE and PECT II (Power Electronics and Control Tool) packages. …”
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    Conference or Workshop Item
  13. 573

    Simulation and Analysis of Short Channel Effects on Bulk and Tri-Gate Multiple Input Floating Gate Mosfet by Mohd Maarof, Siti Nuur Basmin

    Published 2008
    “…While the scaling limits of MOSFET have been widely researched, the scaling of Multiple Input Floating Gate (MIFG) MOSFET devices has been receiving less attention. …”
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    Thesis
  14. 574

    Feasibility Of Using Ebt2 Radiochromic Film And Mosfet For Radiotherapy Dose Measurement In Nasopharynx Cancer Treatment by Eng, Kae Yann

    Published 2017
    “…Thus, both Radiochromic EBT2 film and MOSFET were suitable to be used as radiotherapy…”
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    Thesis
  15. 575

    Numerical simulation analysis of CMOS compatible process of 50nm vertical single and double gate MOSFET by Saad, Ismail, Ismail, Razali

    Published 2007
    “…Vertical MOSFET's have been proposed in the roadmap of semiconductor as a candidate for sub-100 nm CMOS technologies. …”
    Conference or Workshop Item
  16. 576

    Performance analysis of single and dual channel vertical strained SiGe impact ionization MOSFET (VESIMOS) by Saad, I., Seng, B., Hamzah, Z., Bolong, N., Anuar, K., Ghosh, B., Ismail, R.

    Published 2015
    “…In this work, single and dual channel SiGe layer for Vertical Strained Silicon Germanium (SiGe) Impact Ionization MOSFET (VESIMOS) has been successfully analyzed. Presence of the SiGe channel, it improved the I ON /I OFF ratio, subthreshold slope for the Dual Channel VESIMOS. …”
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    Conference or Workshop Item
  17. 577

    Self-aligned vertical double-gate MOSFET (VDGM) with the oblique rotating ion implantation (ORI) method by Saad, Ismail, Ismail, Razali

    Published 2008
    “…A process of making a symmetrical self-aligned n-type vertical double-gate MOSFET (n-VDGM) over a silicon pillar is revealed. …”
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    Article
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