3-D stacked polycrystalline-silicon-MOSFET-based capacitorless DRAM with superior immunity to grain-boundary’s influence by Sang Ho Lee, Jin Park, So Ra Min, Geon Uk Kim, Jaewon Jang, Jin-Hyuk Bae, Sin-Hyung Lee, In Man Kang

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A Fast Recovery Vertical Superjunction MOSFET with n-Si and p-3C-SiC Pillars by Rongyu Gao, Hongyu Cheng, Wenmao Li, Chenkai Deng, Jianguo Chen, Qing Wang, Hongyu Yu

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Active Autonomous Open-Loop Technique for Static and Dynamic Current Balancing of Parallel-Connected Silicon Carbide MOSFETs by Nektarios Giannopoulos, Georgios Ioannidis, Georgios Vokas, Constantinos Psomopoulos

Subjects: “…parallel-connected silicon carbide (SiC) MOSFETs…”
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Study of a hysteresis window of FinFET and fully-depleted silicon-on-insulator (FDSOI) MOSFET with ferroelectric capacitor by Chankeun Yoon, Seungjun Moon, Changhwan Shin

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Ultra-Thin Depleted Silicon On Insulator MOSFET: a simulation based on <em>COMSOL Multiphysics</em>&reg; by José Bustamante, Lionel Trojman

Subjects: “…SOI-MOSFET…”
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High-Resolution Two-Dimensional Imaging of the 4H-SiC MOSFET Channel by Scanning Capacitance Microscopy by Patrick Fiorenza, Mario S. Alessandrino, Beatrice Carbone, Alfio Russo, Fabrizio Roccaforte, Filippo Giannazzo

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Performance Comparison of Silicon- and Gallium-Nitride-Based MOSFETs for a Power-Efficient, DC-to-DC Flyback Converter by Osama Ahmed, Yousuf Khan, Muhammad A. Butt, Nikolay L. Kazanskiy, Svetlana N. Khonina

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Paralleled SiC MOSFETs Circuit Breaker With a SiC MPS Diode for Avalanche Voltage Clamping by Taro Takamori, Keiji Wada, Wataru Saito, Shin-ichi Nishizawa

“…This paper proposes a solid-state circuit breaker comprising silicon carbide (SiC) MOSFETs and a SiC diode, based on the principle of avalanche voltage clamping. …”
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A Machine Learning Approach to Modeling Intrinsic Parameter Fluctuation of Gate-All-Around Si Nanosheet MOSFETs by Rajat Butola, Yiming Li, Sekhar Reddy Kola

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Simulation Study of a 650V Hybrid-Channel SiC Trench MOSFET with Improved On-State Performance by L. Zhang, T. Dai, P.M. Gammon, V.A. Shah, P.A. Mawby, M. Antoniou

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A Novel Analytical Formulation of SiC-MOSFET Losses to Size High-Efficiency Three-Phase Inverters by Pedro Costa, Sónia Pinto, José Fernando Silva

Subjects: “…SiC MOSFETs…”
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High Performance 3.3 kV SiC MOSFET Structure with Built-In MOS-Channel Diode by Jaeyeop Na, Minju Kim, Kwangsoo Kim

“…In this study, a 4H–SiC built-in MOS-channel diode MOSFET with a center P+ implanted structure (CIMCD–MOSFET) is proposed and simulated via technology computer-aided design (TCAD). …”
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Electrical Performance of 28 nm-Node Varying Channel-Width nMOSFETs under DPN Process Treatments by Shou-Yen Chao, Wen-How Lan, Shou-Kong Fan, Zi-Wen Zhon, Mu-Chun Wang

Subjects: “…nMOSFET…”
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An Optimized Vertical GaN Parallel Split Gate Trench MOSFET Device Structure for Improved Switching Performance by Nilesh Kumar Jaiswal, V. N. Ramakrishnan

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High-Frequency Non-Invasive Magnetic Field-Based Condition Monitoring of SiC Power MOSFET Modules by Javad Naghibi, Kamyar Mehran, Martin P. Foster

“…We use a hardware-in-the-loop (HIL) experimental set-up to replicate wire bond-related failures in a 1200 V/55 A SiC MOSFET power module of a DC/DC Boost converter. Signal conditioning circuits are further designed to amplify and buffer the sensor readings. …”
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Investigation of graded channel effect on analog/linearity parameter analysis of junctionless surrounded gate graded channel MOSFET by Sarita Misra, Sudhansu Mohan Biswal, Biswajit Baral, Sudhansu Kumar Pati

“…The proposed device is compared systematically with the conventional junstionless surrounded gate MOSFET(JLSG MOSFET) to investigate their linearity. …”
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Digital-logic assessment of junctionless twin gate trench channel (JL-TGTC) MOSFET for memory circuit applications by Ajay Kumar, Neha Gupta, Aditya Jain, Rajeev Gupta, Bharat Choudhary, Kaushal Kumar, Amit Kumar Goyal, Yehia Massoud

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Electrothermal Power Cycling to Failure of Discrete Planar, Symmetrical Double-Trench and Asymmetrical Trench SiC MOSFETs by Juefei Yang, Saeed Jahdi, Renze Yu, Bernard Stark

Subjects: “…SiC MOSFET…”
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The Design and Process Reliability Analysis of Millimeter Wave CMOS Power Amplifier with a Cold Mode MOSFET Linearization by N. A. Quadir, Amit Jain, S. Kashfi, Lutfi Albasha, Nasser Qaddoumi

“…Analog predistorted technique is used to improve the linearity using a cold mode MOSFET linearizer. The paper reports +19.8 dBm of peak power at the output and power-added efficiency (PAE) of 17% is attained by the designed circuit. …”
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Influence of Different Device Structures on the Degradation for Trench-Gate SiC MOSFETs: Taking Avalanche Stress as an Example by Zhaoxiang Wei, Hao Fu, Xiaowen Yan, Sheng Li, Long Zhang, Jiaxing Wei, Siyang Liu, Weifeng Sun, Weili Wu, Song Bai

Subjects: “…SiC MOSFET…”
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