A Comparative Study of Single- and Dual-Threshold Voltage SRAM Cells by Pragya Kushwaha, Amit Chaudhry

Subjects: “…5T SRAM…”
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Ultra-low voltage SRAM for IoT applications by Cai, Yanru

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(Be)sramna kultura by Gordan Črpić, Krunoslav Novak

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Area-efficient and low stand-by power 1k-byte transmission-gate-based non-imprinting high-speed erase (TNIHE) SRAM by Ho, Weng-Geng, Ne, Kyaw Zwa Lwin, Prashanth Srinivas, Nagarajan, Chong, Kwen-Siong, Kim, Tony Tae-Hyoung, Gwee, Bah Hwee

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0.2 V 8T SRAM With PVT-Aware Bitline Sensing and Column-Based Data Randomization by Do, Anh Tuan, Lee, Zhao Chuan, Wang, Bo, Chang, Ik-Joon, Liu, Xin, Kim, Tony Tae-Hyoung

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Performance Analysis Of SRAM and Dram in Low Power Application by Yuvaraj S., Padmanaban D., PraveenKumar G., Sahu Satendra, Umida Masharipova, Yokeshwaran R.

Subjects: “…sram…”
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On the Critical Role of Ferroelectric Thickness for Negative Capacitance Device-Circuit Interaction by Om Prakash, Aniket Gupta, Girish Pahwa, Yogesh S. Chauhan, Hussam Amrouch

Subjects: “…SRAM…”
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Analysis and Optimization of Defect Generation Due to Mechanical Stress in High-Density SRAM by Kazunari Ishimaru, Mizuki Tamura, Osamu Fujii

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Impact of TFET Unidirectionality and Ambipolarity on the Performance of 6T SRAM Cells by Sebastiano Strangio, Pierpaolo Palestri, DAVID Esseni, Luca Selmi, Felice Crupi, Simon Richter, Qing-Tai Zhao, Siegfried Mantl

Subjects: “…SRAM…”
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Analyzing Sub-Threshold Bitcell Topologies and the Effects of Assist Methods on SRAM V<sub>MIN</sub> by James Boley, Jiajing Wang, Benton H. Calhoun

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TRIO-TCAM: An Area and Energy-Efficient Triple-State-in-Cell Ternary Content-Addressable Memory Architecture by Thanh-Dat Nguyen, Sungju Ryu, Ik-Joon Chang

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Suočavanje s krivnjom i sramom by Josip Bošnjaković

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Performance evaluation of SRAM design using different field effect transistors by C. Venkataiah, Y. Mallikarjuna Rao, Jayamma Manjula, M.K. Linga Murthy, S. Feroz Shah Ahmed, Alzubaidi Laith H.

Subjects: “…sram…”
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Low Power Neural Network by Reducing SRAM Operating Voltage by Keisuke Kozu, Yuya Tanabe, Masato Kitakami, Kazuteru Namba

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Mechanism and Equivalence of Single Event Effects Induced by 14 MeV Neutrons in High-Speed QDR SRAM by Shaohua Yang, Zhangang Zhang, Zhifeng Lei, Teng Tong, Xiaohui Li, Kai Xi, Fugen Wu

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Design and optimization of high-density ternary logic memory circuits by Yang, Zepeng

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Analysis of Physical Unclonable Functions Based on Memory by Semen Valerievich Sukhanov

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Analysis of read speed latency in 6T-SRAM cell using multi-layered graphene nanoribbon and cu based nano-interconnects for high performance memory circuit design by Sandip Bhattacharya, Mohammed Imran Hussain, John Ajayan, Shubham Tayal, Louis Maria Irudaya Leo Joseph, Sreedhar Kollemm, Usha Desai, Syed Musthak Ahmed, Ravichander Janapati

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A Novel Security Key Generation Method for SRAM PUF Based on Fourier Analysis by Wenchao Liu, Zhaojun Lu, Hailong Liu, Run Min, Zhangfan Zeng, Zhenglin Liu

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Design of improved write and read performance 12T sram cell with leakage power control technique by M. Srinu, E. Sreenivasa Rao, P. Chandra Sekhar

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