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Operating System Realization for Real-Time Visualization of CAN-Bus Data Streams using Xilinx Zync SoC
Published 2020-08-01“…Therefore, the in-vehicle cabling network has been replaced with a two-wire bus serial communications protocol called Controller Area Network (CAN). …”
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242
Universal asynchronous receiver/transmitter (UART) design for acoustic signal processor (ASP) based on globally asynchronous locally synchronous (GALS) logic
Published 2009“…In that, a Universal Asynchronous Receiver-Transmitter (UART) module is implemented for the purpose of interfacing with the external world through serial communications. For the need of having an accurate benchmarking of power dissipation, the existing synchronous ASP is analysed and re-prototyped for power analyses. …”
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243
Educational Function of Documentary Television Series: Philosophical Understanding
Published 2020-07-01“…Despite belonging to one television format, science and education serials communicate at the level of iconic and index characters, and more entertaining reality shows are saturated with symbolic signs. …”
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244
Scalable and Configurable Electrical Interface Board for Bus System Development of Different CubeSat Platforms
Published 2022-09-01“…The measured transmission delay was up to 20 ns, which is acceptable for simple serial communications such as UART and SPI. Furthermore, the measured energy consumption of the backplane per ISS orbit was only 28 mWh. …”
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245
Aggregated CDMA Crossbar With Hybrid ARQ for NoCs
Published 2022-01-01“…However, existing CDMA switches are bit-wise architectures in which a binary data bit is spread and serially communicated on an exclusive digital channel while replicating this configuration to communicate multiple data bits, which increases the crossbar area and wiring density. …”
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