Design of a new type of pre-charge circuit of single-quadrant frequency converter by TANG Bai-shan, HUANG Cui-bai

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Design and Implementation of Asynchronous Processor on FPGA by Ziho Shin, Myeong-Hoon Oh

“…In this study, we propose asynchronous circuit design techniques for field-programmable gate arrays (FPGA) that can fundamentally overcome the drawbacks of conventional synchronous circuit designs. We used commercial FPGAs and implemented an asynchronous MSP430 microprocessor using the proposed technique. …”
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Asynchronous circuit compiler design by Tan, Lik Sin.

“…Asynchronous circuits have inherent advantages over synchronous circuits. In spite of these advantages, synchronous circuits remain dominant in the industry and asynchronous circuits remain largely an academic pursuit. …”
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Automated circuit diagram generator by Lok, Xin Quan

“…The program has its constraints as it is unable to handle more complex synchronous circuit written in Verilog. We will also explore on features that can be realised in order to make it more robust and practical.…”
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Design methodologies for robust and low-overhead asynchronous quasi-delay-insensitive digital systems by Zhou, Rong

“…The coding specifications are constructed based on the standard Verilog HDL language, to seamlessly integrate into the standard synchronous circuit design flow, giving it full leverages to design async QDI circuits by using the commercial Electronic Design Automation tools. …”
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Asynchronous QDI library cell layout development and characterization by Hutapea, Samuel Frederick

“…Synchronous circuits have been the prevalent choice of the electronics industry over asynchronous circuits. …”
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RTL Conversion Method From Pipelined Synchronous RTL Models Into Asynchronous Ones by Shogo Semba, Hiroshi Saito

“…The synthesized asynchronous circuits without the optimization methods could reduce the energy consumption by 1.47% on average compared to synchronous circuits. Moreover, the optimization methods could reduce the energy consumption by 15.12% on average compared to synchronous circuits. …”
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A novel frequency response measurement method for wideband ADCs' system by Yi Zhou, Peng Ye, Kuojun Yang, Yijiao Zhang

“…However, existing measurement methods require complex synchronous circuits or are susceptible to noise. This paper proposes a new frequency response measurement method, which can be realised by a simple circuit without any synchronisation measures. …”
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Combining Relaxation With NCL_X for Enhanced Optimization of Asynchronous Null Convention Logic Circuits by Danylo Khodosevych, Alexander C. Bodoh, Ashiq A. Sakib, Scott C. Smith

“…Quasi-Delay Insensitive (QDI) asynchronous circuits, such as NULL Convention Logic (NCL), are being utilized more and more in industry to mitigate timing issues associated with process, voltage, and temperature (PVT) variations, which are making timing closure for synchronous circuits more problematic as transistor feature size continues to shrink. …”
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NMOS-Based Integrated Modular Bypass for Use in Solar Systems (NIMBUS): Intelligent Bypass for Reducing Partial Shading Power Loss in Solar Panel Applications by Pieter Bauwens, Jan Doutreloigne

“…When two or more NIMBUS chips are placed in parallel, an internal synchronization circuit ensures proper operation to provide for larger load currents. …”
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Asynchronous QDI library cell layout development and characterization by Choy, Joel Guo Wen

“…Asynchronous clock-less circuits are used in digital system that serves as an alternative for synchronous circuits. In asynchronous circuits, it employs hand-shaking protocol that replaces the need for a timing circuit. …”
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Multi-Threshold NULL Convention Logic (MTNCL): An Ultra-Low Power Asynchronous Circuit Design Methodology by Liang Zhou, Ravi Parameswaran, Farhad A. Parsan, Scott C. Smith, Jia Di

“…This paper develops an ultra-low power asynchronous circuit design methodology, called Multi-Threshold NULL Convention Logic (MTNCL), also known as Sleep Convention Logic (SCL), which combines Multi-Threshold CMOS (MTCMOS) with NULL Convention Logic (NCL), to yield significant power reduction without any of the drawbacks of applying MTCMOS to synchronous circuits. In contrast to other power reduction techniques that usually result in large area overhead, MTNCL circuits are actually smaller than their original NCL versions. …”
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<italic>Mix &#x0026; Latch:</italic> An Optimization Flow for High-Performance Designs With Single-Clock Mixed-Polarity Latches and Flip-Flops by Filippo Minnella, Jordi Cortadella, Mario R. Casu, Mihai T. Lazarescu, Luciano Lavagno

“…Flip-flops are the most used sequential elements in synchronous circuits, but designs based on latches can operate at higher frequencies and occupy less area. …”
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