High Precision Multiplier for RNS {2ⁿ−1,2ⁿ,2ⁿ+1} by Shang Ma, Shuai Hu, Zeguo Yang, Xuesi Wang, Meiqing Liu, Jianhao Hu

Subjects: Get full text

Macromodeling CMOS circuits for timing simulation

Subjects: “…Integrated circuits Very large scale integration…”
Get full text

VSLI 85 : VLSI design of digital systems / by IFIP TC 10/WG 10.5 International Conference on Very Large Scale Integration (1985 : Tokyo, Japan), Horbst, E.

A Neuron Model for FPGA Spiking Neuronal Network Implementation by BONTEANU, G., TIGAERU, L.

Subjects: Get full text

Microstructured Electroceutical Fiber‐Device for Inhibition of Bacterial Proliferation in Wounds by Louis Alexandre van derElst, Merve Gokce, Jeffery Robert Coulter, Zeynep Burcu Cavdar, Veda Narayana Koraganji, Murat Ozturk, Subhadip Ghatak, Chandan K. Sen, Alexander Gumennik

Subjects: Get full text

VLSI-SOC, from systems to chips : IFIP TC 10/ WG 10.5 Twelfth International Conference on Very Large Scale Integration of System on Chip (VLSI-SoC 2003), December 1-3, 2003, Darmstadt, Germany / by IFIP TC 10/WG 10.5 International Conference on Very Large Scale Integration (12th : 2003 : Darmstadt, Germany), Glesner, Manfred

A Low Cost Matching Motion Estimation Sensor Based on the NIOS II Microprocessor by Diego González, Guillermo Botella, Uwe Meyer-Baese, Carlos García, Concepción Sanz, Manuel Prieto-Matías, Francisco Tirado

Subjects: Get full text

On the Non-STDP Behavior and Its Remedy in a Floating-Gate Synapse by Gopalakrishnan, Roshan, Basu, Arindam

Subjects: “…Floating gate (FG); learning; neuromorphic; neuroscience; spike-timing-dependent plasticity (STDP); synapse; very large scale integration (VLSI)…”
Get full text
Get full text

Development of Circuits for Antilogarithmic Converters with Efficient Error–Area–Delay Product Using the Fractional-Bit Compensation Scheme for Digital Signal Processing Applicatio... by Chao-Tsung Kuo

Subjects: Get full text

VLSI Implementation of a Cost-Efficient Loeffler DCT Algorithm with Recursive CORDIC for DCT-Based Encoder by Rih-Lung Chung, Chen-Wei Chen, Chiung-An Chen, Patricia Angela R. Abu, Shih-Lun Chen

Subjects: Get full text

Custom Integrated Circuits by Allen, Jonathan, Penfield, Paul L., Jr., Rivest, Ronald L., Sussman, Gerald J., Shrobe, Howard, Glasser, Lance A.

Subjects: Get full text

Noise-Aware and Light-Weight VLSI Design of Bilateral Filter for Robust and Fast Image Denoising in Mobile Systems by Sung-Joon Jang, Youngbae Hwang

Subjects: Get full text

Efficient BinDCT hardware architecture exploration and implementation on FPGA by Abdessalem Ben Abdelali, Ichraf Chatti, Marwa Hannachi, Abdellatif Mtibaa

Subjects: Get full text

A Novel Low-Power Synchronous Preamble Data Line Chip Design for Oscillator Control Interface by Shih-Lun Chen, Tsun-Kuang Chi, Min-Chun Tuan, Chiung-An Chen, Liang-Hung Wang, Wei-Yuan Chiang, Ming-Yi Lin, Patricia Angela R. Abu

Subjects: “…electronic device measurement and very-large-scale integration (VLSI)…”
Get full text

Custom Integrated Circuits by Allen, Jonathan, Penfield, Paul L., Jr., Rivest, Ronald L., Sussman, Gerald J., Shrobe, Howard, Glasser, Lance A., Bain, Isaac, Zukowski, Charles, Matson, Mark

Subjects: Get full text

Very large scale integration (VLSI) design of a channel estimator; The development of power electronic ; Kimpalan frekuensi tinggi; Pemancar frekuensi tinggi; Rekabentuk VLSI pemproses enkripsi digital; Merekabentuk dan membina sebuah bekalan kuasa pensiusan berpengaturan; Universal interfacing amplifier for personal computers; Sistem penghantaran data optik [mikrofilem]/ by Wee, Yu Seang, Norlizah Zainal, Abdul Rashid Abu Bakar, Kamal Deraman, Samura Ali, Sulaiman Subari, Zulkifilie Ibrahim, Roziah Abdullah @ Ngah

Evaluating CMOS chip sensitivity parameters to single event upsets under influence of neutrons by the burst generation rate function by Dmitry O. Titovets, Nikolay D. Kravchenko, Andrey B. Karakozov, Alexander I. Chumakov, Dmitry V. Bobrovsky

Subjects: “…information security, single event upset (seu), neutrons, cmos very large-scale integration (vlsi), burst generation rate (bgr), microprocessors (mpu), microcontrollers (mcu), field-programmable gate array (fpga).…”
Get full text

Full‐custom hardware implementation of point multiplication on binary Edwards curves for application‐specific integrated circuit elliptic curve cryptosystem applications by Bahram Rashidi, Sayed Masoud Sayedi, Reza Rezaeian Farashahi

Subjects: “…high-speed very large-scale integration implementation…”
Get full text

Custom Integrated Circuits by Allen, Jonathan, Penfield, Paul L., Jr., Rivest, Ronald L., Sussman, Gerald J., Shrobe, Howard, Glasser, Lance A., Wyatt, John L., Jr., Bain, Isaac, Zukowski, Charles, Matson, Mark, Tan, Han-Ngee, Yew, Pearl, O'Brien, Peter

Subjects: Get full text

Custom Integrated Circuits by Allen, Jonathan, Armstrong, Robert C., Baltus, Donald G., Bamji, Cyrus S., Hauck, Charles, McCormick, Steven P., Seiler, Larry, Musicus, Bruce R., Jeong, Hong, Levy, Bernard, Kuo, Chung-Chieh, Wright, Rosalind H., Glasser, Lance A., Matson, Mark D., Penfield, Paul L., Jr., Wyatt, John L., Jr., Bain, Isaac, Song, William, Wroclawski, John, Zukowski, Charles, Yu, Quinjian, Tan, Han-Ngee, Nabors, Keith S., Standley, David L., O'Brien, Peter

Subjects: Get full text