Asynchronous circuit compiler design by Tan, Lik Sin.

“…The report has elaborated the Final Year Project (FYP), namely Asynchronous Circuit Design Compiler. Asynchronous circuits have inherent advantages over synchronous circuits. …”
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Synthesis and testing of asynchronous circuits - micropipeline by Khaing, Kathy.

“…Regardless of how successful synchronous systems are, asynchronous design is an important research area since most of the asynchronous circuits provide higher performance. Since asynchronous circuits having no globally distributed clock, there are no problems about the clock skew occurring in synchronous systems. …”
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Low Normalized Energy Derivation Asynchronous Circuit Synthesis Flow through Fork-Join Slack Matching for Cryptographic Applications by Liu, Nan, Chong, Kwen-Siong, Ho, Weng-Geng, Gwee, Bah Hwee, Chang, Joseph Sylvester

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Indicating asynchronous array multipliers by Balasubramanian, Padmanabhan, Maskell, Douglas Leslie

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Quasi-delay-insensitive implementation of approximate addition by Balasubramanian, Padmanabhan, Mastorakis, Nikos E.

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Dual-hiding side-channel-attack resistant FPGA-based asynchronous-logic AES : design, countermeasures and evaluation by Chong, Kwen-Siong, Ng, Jun-Sheng, Chen, Juncheng, Lwin, Ne Kyaw Zwa, Kyaw, Nay Aung, Ho, Weng-Geng, Chang, Joseph, Gwee, Bah-Hwee

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Monotonic asynchronous two-bit full adder by Balasubramanian, Padmanabhan, Maskell, Douglas Leslie

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High-speed and energy-efficient asynchronous carry look-ahead adder by Balasubramanian, Padmanabhan, Liu, Weichen

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Design and VHDL modelling of an asynchronous microprocessor ; Design and VHDL modeling of an asynchronous microprocessor (Data Path Unit) ; Host interface software for parallel com... by Cheng, Ei Jun, Choy, Hung Wah, Fong, Fook Soon, Ho, Chee Wah, Loo, Keng Leong @ Loh, Keng Leong, Mohd. Zamri Mustapha, Nai, Choon Ching

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A monotonic asynchronous full adder by Balasubramanian, Padmanabhan, Maskell, Douglas L.

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A monotonic early output asynchronous full adder by Balasubramanian, Padmanabhan, Maskell, Douglas L.

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Design automation for characterizing low soft-error-rate library cells by Wu, Liuhao

“…Without a common clock signal governing millions of circuital components as the conventional synchronous designs do, the asynchronous circuit can minimise the chance of being affected by distorted clock signals caused by EMI. …”
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Design of 128-Bit asynchronous-logic AES processor by Chua, Elton Yi Wei

“…However, research has suggested that Side Channel Attacks that target the hardware vulnerabilities of the AES processor can be effective. In response, Asynchronous circuit design has been proposed to reduce the effectiveness of Side Channel Attacks. …”
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Hazard simulation of asynchronous logic circuits by Gong, Jie.

“…Asynchronous circuits have recently played an increasing role in the design of high speed VLSI system, since they can achieve higher performance with lower power consumption. …”
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Asynchronous QDI library cell layout development and characterization by Hutapea, Samuel Frederick

“…As a consequence, more studies on asynchronous circuits are conducted to discover their effective application for industrial needs. …”
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VLSI circuit attributes optimization using genetic algorithm by Deshpande, Varun

“…The results obtained show that the Genetic Algorithm is indeed a successful and powerful tool to solve optimization problems with respect to Asynchronous Circuits. However, there is balance which needs to be sought in terms of delay (speed) and power dissipation. …”
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Asynchronous QDI library cell layout development and characterization by Choy, Joel Guo Wen

“…Asynchronous clock-less circuits are used in digital system that serves as an alternative for synchronous circuits. In asynchronous circuits, it employs hand-shaking protocol that replaces the need for a timing circuit. …”
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