Showing 12,301 - 12,320 results of 16,001 for search '"bit"', query time: 0.16s Refine Results
  1. 12301

    Backdoor attacks against deep image compression via adaptive frequency trigger by Yu, Yi, Wang, Yufei, Yang, Wenhan, Lu, Shijian, Tan, Yap Peng, Kot, Alex Chichung

    Published 2023
    “…In particular, we design several attack objectives for various attacking scenarios, including: 1) attacking compression quality in terms of bit-rate and reconstruction quality; 2) attacking task-driven measures, such as down-stream face recognition and semantic segmentation. …”
    Get full text
    Get full text
    Conference Paper
  2. 12302

    A monotonic early output asynchronous full adder by Balasubramanian, Padmanabhan, Maskell, Douglas L.

    Published 2023
    “…When utilized in a ripple carry adder (RCA) architecture, the proposed full adder achieves significant reductions in design metrics, such as cycle time, area, and power, compared to existing IOM asynchronous full adders. For a 32-bit RCA implementation using a 28 nm CMOS technology, the proposed full adder outperforms an existing state-of-the-art high-speed asynchronous full adder by reducing the cycle time by 10.4% and the area by 15.8% for RtZ handshaking and reduces the cycle time by 9.8% and the area by 15.8% for RtO handshaking without incurring any power penalty. …”
    Get full text
    Journal Article
  3. 12303

    High-speed and energy-efficient asynchronous carry look-ahead adder by Balasubramanian, Padmanabhan, Liu, Weichen

    Published 2023
    “…The proposed BCLA has a slight edge over the proposed SCLA, and the proposed BCLA reports the following optimizations in design metrics such as cycle time (delay), area, and power compared to a recently presented state-of-the-art asynchronous CLA for a 32-bit addition: (i) 32.6% reduction in cycle time, 29% reduction in area, 4.3% reduction in power, and 35.5% reduction in energy for RZH, and (ii) 31.4% reduction in cycle time, 28.9% reduction in area, 4.4% reduction in power, and 34.4% reduction in energy for ROH. …”
    Get full text
    Journal Article
  4. 12304

    A monotonic asynchronous full adder by Balasubramanian, Padmanabhan, Maskell, Douglas L.

    Published 2023
    “…Compared to the best of the existing high-speed asynchronous full adders, the proposed full adder enables a 10.4% reduction in cycle time and a 15.8% reduction in area without any power penalty when incorporated in a 32-bit RCA, for implementation using a 28-nm CMOS technology. …”
    Get full text
    Conference Paper
  5. 12305

    Automatic preimage attack framework on Ascon using a linearize-and-guess approach by Li, Huina, He, Le, Chen, Shiyao, Guo, Jian, Qiu, Weidong

    Published 2023
    “…As a result, the complexity of finding a preimage for 2-round Ascon-Xof with a 64-bit hash value can be significantly reduced from 2^39 guesses to 2^27.56 guesses. …”
    Get full text
    Journal Article
  6. 12306

    Design and analysis of integrated array antennas for millimeter-wave applications by Zhang, Bing

    Published 2013
    “…The increasing demand for high bit rate wireless communication prompted people resort to the millimeter-wave (mmWave) spectrum, in which the free licensed 60-GHz band is of great application prospect. …”
    Get full text
    Thesis
  7. 12307

    Study on shared right turn/straight lanes at signalised junctions by Sam, Wei Jing

    Published 2014
    “…At major junctions in Singapore, typical lanes that can be found include the left turn lane, the straight lane, the right turn lane, and occasionally a shared straight/right turn lane. A quick bit of research shows that this arrangement of having a lane service both the through traffic and right turners while both directions have additional lanes dedicated to each directions on either side of the shared lane is fairly uncommon. …”
    Get full text
    Final Year Project (FYP)
  8. 12308

    Class-D amplifier power stage with PWM feedback loop by Lam, Chun Kit

    Published 2015
    “…The pulse modulator quantizes the input audio signal into a single-bit high frequency pulse signal. Depending on the implementation of the pulse modulation stage, the Class-D power amplifier can be designed to amplify either analog or digital audio signal efficiently. …”
    Get full text
    Thesis
  9. 12309

    Perception of citizens towards privacy loss in Smart Nation Singapore by Lim, Han Boon

    Published 2016
    “…The narratives of this initiative suggest a country connected from home to port, accessible from personal devices such as smartwatches and mobile phones, with analysis done on every bit of data generated by each and every citizen just going about their daily task. …”
    Get full text
    Thesis
  10. 12310

    Propagation studies of HDTV using DVB-T2 in Singapore by Lim, Wan Xi

    Published 2017
    “…The PROMAX TV EXPLORER HD+ is used in the project to measure DVB-T2 parameters like the signal strength, Carrier-to-Noise Ratio (CNR) and the Bit Error Rate (BER). Firstly, measurement was done at the outdoor area with Line Of Sight (LOS) to the transmitter. …”
    Get full text
    Thesis
  11. 12311

    Demonstration of a quasi-gapless integrated visible light communication and positioning system by Yang, Helin, Chen, Chen, Zhong, Wen-De, Alphones, Arokiaswami, Zhang, Sheng, Du, Pengfei

    Published 2019
    “…Moreover, a comparable bit error rate (BER) performance can be achieved for both OFDM–SCM and FBMC-SCM. …”
    Get full text
    Get full text
    Journal Article
  12. 12312

    K-locked-loop and its application in time mode ADC by Hor, Hon Cheong, Siek, Liter

    Published 2010
    “…In this paper, a new concept named K-locked-loop is proposed to solve the nonlinearity issue of VCO within a time mode ADC. A 9-bit, 0.5MS/s time mode ADC has been modeled using SIMULINK tool in Matlab. …”
    Get full text
    Get full text
    Get full text
    Get full text
    Conference Paper
  13. 12313

    Hybrid-mode SRAM sense amplifiers : new approach on transistor sizing by Do, Anh Tuan, Kong, Zhi Hui, Yeo, Kiat Seng

    Published 2010
    “…It also offers a much better read-effectiveness and robustness against the bit- and data-line capacitances as well as VDD variations. …”
    Get full text
    Get full text
    Journal Article
  14. 12314

    Area-saving technique for low-error redundant binary fixed-width multiplier implementation by Juang, Tso Bing, Wei, Chi Chung, Chang, Chip Hong

    Published 2010
    “…Our proposed technique has led to a fixed-width multiplier architecture with the same accuracy and up to 42% area saving for 10×10-bit multiplication over the conventional redundant binary fixed-width multiplier architecture in 0.18 m CMOS standard cell implementation under the same timing constraint.…”
    Get full text
    Get full text
    Get full text
    Conference Paper
  15. 12315

    Directionlets using in-phase lifting for image representation by Makur, Anamitra, Jayachandra, Dakala

    Published 2014
    “…First, failure to exploit the correlation across block boundaries degrades the coding performance and also induces blocking artifacts, thus making it mandatory to use de-blocking filter at low bit rates. Second, spatial scalability, i.e., minimum segment size or the number of levels of the transform, is limited due to independent processing of segments. …”
    Get full text
    Get full text
    Journal Article
  16. 12316

    Hybrid bidirectional radio-over-fiber-based orthogonal frequency division multiple access-passive optical network supporting 60/120 GHz using offset quadrate phase shift keying by Zhang, Chongfu, Chen, Chen, Qiu, Kun

    Published 2015
    “…Both 60- and 120-GHz MMWs are obtained for the transmission of the high bit-rate services in source-free optical network units (ONUs), only using a single 15-GHz sinusoidal wave source. …”
    Get full text
    Get full text
    Journal Article
  17. 12317

    Message Extension Attack against Authenticated Encryptions: Application to PANDA by Sasaki, Yu, Wang, Lei

    Published 2016
    “…We successfully found an existential forgery attack on PANDA with 25 chosen plaintexts, 264 computations, and a negligible memory, and it breaks the claimed 128-bit security for the nonce-repeating model. We note that this is the first result that breaks the security claim of PANDA, which makes it withdrawn from the CAESAR competition by its designer.…”
    Get full text
    Get full text
    Journal Article
  18. 12318

    High-speed silicon modulators for the 2  μm wavelength band by Cao, Wei, Hagan, David, Thomson, David J., Nedeljkovic, Milos, Knights, Andy, Wang, Junjia, Gardes, Frederic, Zhang, Weiwei, Liu, Shenghao, Li, Ke, Xin, Guo, Wang, Wanjun, Wang, Hong, Reed, Graham T., Mashanovich, Goran Z., Littlejohns, Callum George, Shaif-Ul Alam, Mohamed Said Rouifed

    Published 2019
    “…We also show a ring modulator paired with a low power integrated driver working in hybrid carrier depletion and injection mode at a data rate of 3 Gbit/s with power consumption of 2.38 pJ/bit in the 2 μm wavelength range. This work is a proof of principle demonstration and paves a route toward a full silicon-based transceiver in the 2 μm window.…”
    Get full text
    Get full text
    Journal Article
  19. 12319

    Power of one qumode for quantum computation by Liu, Nana, Thompson, Jayne, Weedbrook, Christian, Lloyd, Seth, Vedral, Vlatko, Gu, Mile, Modi, Kavan

    Published 2018
    “…This model is inspired by an interesting computational model known as deterministic quantum computing with one quantum bit (DQC1). Using the power of one qumode, we identify that the amount of squeezing is sufficient to quantify the resource requirements of different computational problems based on phase estimation. …”
    Get full text
    Get full text
    Journal Article
  20. 12320

    3D barcodes : theoretical aspects and practical implementation by Gladstein, David, Kakarala, Ramakrishna, Baharav, Zachi

    Published 2018
    “…A 3D barcode is composed of an array of 3D cells, called modules, and each can be either filled or empty, corresponding to two possible values of a bit. These barcodes have great theoretical promise thanks to their very large information capacity, which grows as the cube of the linear size of the barcode, and in addition are becoming practically manufacturable thanks to the ubiquitous use of 3D printers. …”
    Get full text
    Get full text
    Conference Paper