An Optimization on the Neuronal Networks Based on the ADEX Biological Model in Terms of LUT-State Behaviors: Digital Design and Realization on FPGA Platforms by Yule Wang, Osman Taylan, Abdulaziz S. Alkabaa, Ijaz Ahmad, Elsayed Tag-Eldin, Ehsan Nazemi, Mohammed Balubaid, Hanan Saud Alqabbaa

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A FPGA implementation of GMM MUD algorithm for space formation aircraft communication system by Ma Bo, Xu Mingdong, Wu Zhilu

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Ponte: Represent Totally Binary Neural Network Toward Efficiency by Jia Xu, Han Pu, Dong Wang

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Reducing the hardware requirements in FPGAbased controllers: a photovoltaic application by C.A. Ramos-Paja, E. Mamarelis, G. Petrone, G. Spagnuolo, M. Vitelli, R. Giral

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Complex Periodic Motions and Bifurcations of a Forced Duffing Oscillator with Its Field-Programmable Gate Arrays Implementation by Yan Liu, Zehua Yang, Taokai Mao, Wencheng Li

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Dedicated hardware architecture for localizing iris in VW images by Vineet Kumar, Abhijit Asati, Anu Gupta

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RF eigenfingerprints, an Efficient RF Fingerprinting Method in IoT Context by Louis Morge-Rollet, Frédéric Le Roy, Denis Le Jeune, Charles Canaff, Roland Gautier

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A Novel and Efficient Hardware Implementation of Scalar Point Multiplier by M. Masoumi, H. Mahdizadeh

Subjects: “…FPGA Implementation…”
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Real-Time Direction Judgment System of Sub-Nanometer Scale Grating Ruler by Simin Li, Jingkun Wang, Wentao Zhang, Hao Du, Xianming Xiong

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FPGA implementation of nonlinear equations with delay by Ulrich Gaël Ngouabo, Frank Xavier Ngagoum Tchamdjeu

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Real-Time Direction Judgment System for Dual-Frequency Laser Interferometer by Qilin Zeng, Wenwei Chen, Hua Du, Wentao Zhang, Xianming Xiong, Zhengyi Zhao, Fangjun Zhou, Xin Guo, Le Xu

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Design and Evaluation of Countermeasures Against Fault Injection Attacks and Power Side-Channel Leakage Exploration for AES Block Cipher by F. E. Potestad-Ordonez, E. Tena-Sanchez, A. J. Acosta-Jimenez, C. J. Jimenez-Fernandez, Ricardo Chaves

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Efficient storage method for FPGA-based partially parallel QC-LDPC decoder by Rui-jia YUAN, Bao-ming BAI

Subjects: “…LDPC code;decoder;partially parallel;efficient storage;FPGA implementation…”
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Efficient implementation scheme of SM4 algorithm based on FPGA by ZHANG Hongke, YUAN Haonan, DING Wenxiu, YAN Zheng, LI Bin, LIANG Dong

Subjects: “…SM4 algorithm;FPGA implementation;pipeline architecture;algebraic S-box…”
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Efficient storage method for FPGA-based partially parallel QC-LDPC decoder by Rui-jia YUAN, Bao-ming BAI

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Mathematical Model and FPGA Realization of a Multi-Stable Chaotic Dynamical System with a Closed Butterfly-Like Curve of Equilibrium Points by Aceng Sambas, Sundarapandian Vaidyanathan, Talal Bonny, Sen Zhang, Sukono, Yuyun Hidayat, Gugun Gundara, Mustafa Mamat

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Efficient implementation scheme of SM4 algorithm based on FPGA by ZHANG Hongke, YUAN Haonan, DING Wenxiu, YAN Zheng, LI Bin, LIANG Dong

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FPGA Implementation of Complex-Valued Neural Network for Polar-Represented Image Classification by Maruf Ahmad, Lei Zhang, Muhammad E. H. Chowdhury

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Design and FPGA implementation of an efficient parallel Turbo decoder for combining state metric calculations by Qian ZHANG, Ming ZHAN, Jianwu ZHANG, Fulong WANG, Yunkai1 FENG, Hao TANG

Subjects: “…state measure merge calculation;Turbo code;FPGA implementation;parallel algorithm…”
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Proposal and Implementation of a Procedure for Compliance Recognition of Objects with Smart Tactile Sensors by Raúl Lora-Rivera, Óscar Oballe-Peinado, Fernando Vidal-Verdú

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