Hillside homes : 208 sloping lot & multi-level designs 1,000 to over 5, 500 square feet / by Prideaux, Jan, Home Planners, inc.

Fast-Charging Sodium-Ion Batteries Enabled by Molecular-Level Designed Nitrogen and Phosphorus Codoped Mesoporous Soft Carbon by Lei Liu, Zhuzhu Du, Jiaqi Wang, Hongfang Du, Sheng Wu, Mengjun Li, Yixuan Zhang, Jinmeng Sun, Zhipeng Sun, Wei Ai

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Thermoelectric generation for waste heat recovery : application of a system level design optimization approach via Taguchi method by Ji, Dongxu, Wei, Zhongbao, Mazzoni, Stefano, Mengarelli, Marco, Rajoo, Srithar, Zhao, Jiyun, Pou, Josep, Romagnoli, Alessandro

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Thermoelectric generation for waste heat recovery: Application of a system level design optimization approach via Taguchi method by Ji, Dongxu, Wei, Zhongbao, Mazzoni, Stefano, Mengarelli, Marco, Rajoo, Srithar, Zhao, Jiyun, Pou, Josep, Romagnoli, Alessandro

Toolset for SystemC code generation of heterogeneous platforms by Pavel Ivanov, Evgeny Gavrin

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The Good City: Design for Sustainability by Victor Margolin

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Effective Immobilization of Agrobacterium sp. IFO 13140 Cells in Loofa Sponge for Curdlan Biosynthesis by Camila Ortiz Martinez, Suelen Pereira Ruiz, Marcela Tiemi Nogueira, Evandro Bona, Márcia Portilho, Graciette Matioli

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Guiding with a Soft Touch by Mark Tempini

Subjects: “…Level Design;…”
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Design for testability (DFT) method at register transfer level design for greatest common divisor (GCD) and finite impulse response (FIR) / by Tim, Wei Lun, 1992-, author, Norlina Paraman, supervisor, Fakulti Kejuruteraan Elektrik

Register transfer level design of transpose memory for the two-dimension inverse discrete cosine transform for high efficiency video coding / by Goh, Dih Jiann, 1993- , author 614604, Ab. Al-Hadi Ab. Rahman, supervisor 255270, Fakulti Kejuruteraan Elektrik 540663

Register transfer level design of transpose memory for the two-dimension inverse discrete cosine transform for high efficiency video coding / by Goh, Dih Jiann, 1993- , author 614604

Switch sharing of CMOS circuits in switch-level design(CMOS电路开关级设计中的开关共享研究) by WUXun-wei(吴训威), SHENYan-fei(沈雁飞), HUJian-ping(胡建平)

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Register transfer level design of transpose memory for the two-dimension inverse discrete cosine transform for high efficiency video coding by Goh, Dih Jiann

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UML2SC: A tool for developing complex electronic systems using UML and SystemC by Blanca Alicia Correa, Juan Fernando Eusse, Danny Múnera, Silvio Sepúlveda, Juan Fernando Vélez, José Edinson Aedo

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Analytical Performance and Greenness Evaluation of Five Multi-Level Design Models Utilized for Impurity Profiling of Favipiravir, a Promising COVID-19 Antiviral Drug by Adel Ehab Ibrahim, Yasmine Ahmed Sharaf, Sami El Deeb, Rania Adel Sayed

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Elementary operations: a novel concept for source-level timing estimation by Nikolina Frid, Danko Ivošević, Vlado Sruk

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« Parcours critique » et conception de niveaux vidéoludiques by Guillaume Grandjean

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Computing Power Service System of China and Its Development Path by Chen Xiaohong, Xu Guanying, Xu Xuesong, Tian Zhiping, Huo Yangjie, Yi Guodong

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Template-Based Semi-Formal Approach to Robust Equivalence Checking by Qinhao Wang, Masahiro Fujita

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Full-factorial Two-level Design in Optimizing the Contents of Olivine and Coir Fiber for Improving the Strength Property of a Soft Marine Clay by Endene Emmanuel, Lee Li Yong, Afshin Asadi, Vivi Anggraini

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